Microprocessor Data Envelope Management for High-Fidelity Audio

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Solution Overview

Problem

Traditional digital signal processors (DSPs) face challenges in balancing high performance with low power consumption, especially with the increasing demand for higher fidelity audio processing, which leads to increased power consumption and memory requirements due to higher precision audio data handling.

Innovation Solution

A microprocessor design that includes a memory interface for loading or storing data via data envelopes of varying lengths, with control logic to efficiently manage data elements of shorter lengths within registers, allowing for efficient loading and storing of data elements in parallel, and implementing instructions for data merging and address incrementation to optimize memory usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the precision of audio data is extended from 16-bit to 24-bit, then audio fidelity is improved, but memory requirements and power consumption increase

Engineering Contradiction:
Improveaudio data precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent segments audio data processing into distinct functional units: a data acquisition unit that interfaces with memory using 32-bit data envelopes, and a processing unit that operates on 24-bit audio samples. This segmentation allows the system to use higher precision 24-bit data for processing while managing memory bandwidth through 32-bit envelope structures, reducing the overhead of precision conversion operations and thereby lowering power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the data representation parameter by introducing 32-bit data envelopes that contain 24-bit audio samples. This parameter change optimizes the balance between memory interface efficiency (32-bit width) and audio processing precision (24-bit samples), eliminating the need for additional precision conversion operations and reducing overall power consumption while maintaining high audio fidelity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the precision of audio data is extended from 16-bit to 24-bit, then audio fidelity is improved, but memory requirements increase

Engineering Contradiction:
Improveaudio data precisionVSAvoidmemory requirements
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent implements a nested data structure where 24-bit audio samples are nested within 32-bit data envelopes. Each data envelope acts as a container that holds one or more 24-bit audio samples along with necessary metadata or control information. This nesting approach allows efficient memory utilization by packing data tightly without requiring separate storage structures, thereby reducing overall memory requirements while supporting high-precision 24-bit audio processing.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Productivity

If the number of parallel operations is increased, then processing performance is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent ensures continuous useful action by designing the data acquisition unit to continuously supply 32-bit data envelopes containing 24-bit audio samples to the processing unit without interruption. This continuous data flow enables the processing unit to maintain high parallel operation throughput, improving processing performance while avoiding the power overhead of repeated data fetching and precision conversion operations that would occur with discontinuous processing.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent introduces 32-bit data envelopes as an intermediary structure between the memory interface and the 24-bit audio processing unit. This intermediary enables efficient data transfer by matching the memory interface width (32-bit) with the audio data precision requirements (24-bit), allowing parallel operations to proceed smoothly without additional conversion overhead, thereby improving performance while controlling power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Measurement precision

If 24-bit precision audio data is stored in 32-bit memory units, then audio fidelity is maintained, but memory efficiency decreases

Engineering Contradiction:
Improveaudio data precisionVSAvoidmemory efficiency
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent makes the 32-bit data envelope structure universal by designing it to handle multiple functions: storing 24-bit audio samples, carrying control information, and interfacing with 32-bit memory units. This multi-functional design allows the same data structure to be used throughout the system without requiring separate optimized structures for different purposes, maintaining memory efficiency while preserving 24-bit audio precision through the standardized envelope interface.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8935468B2Audio digital signal processor
Publication Date: 2015.01.13 CADENCE DESIGN SYST INC
  • US8935468B2 patent drawing
  • US8935468B2 patent drawing
  • US8935468B2 patent drawing

AI summary

A microprocessor includes a memory interface to obtain data envelopes of a first length, and control logic to implement an instruction to load an initial data envelope of a stream of data values into a buffer, each data value having a second length shorter than the first length, the stream of data values being disposed across successive data envelopes at the memory interface. Another instruction merges current contents of the buffer and the memory interface such that each invocation loads one of the data values into a first register, and moves at least a remainder of the current contents of the memory interface into the buffer for use in a successive invocation. Another instruction loads a reversed representation of a set of data values obtained via the memory interface into a second register. Another instruction implements an FIR computation including a SIMD operation involving multiple data values of the stream and the reversed representation.