Microprocessor Hardware Error Recognition via Microcontroller Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for recognizing hardware errors in microprocessors, particularly in safety-critical applications, are inadequate for systems without lockstep configurations, as they lack flexibility and reliability in comparing results across multiple processors.
Innovation Solution
A method and device that compare results of safety-relevant applications running on multiple microprocessors using a microcontroller, which provides various comparison strategies and parameters, allowing for flexible and rapid recognition of hardware errors by comparing strategies and results, and optionally discontinuing calculations if errors are detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lockstep configuration is used for hardware error recognition, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent uses multiple copies of the same application running on different microprocessors (first application on first microprocessor, second application on second microprocessor) to detect hardware errors. Instead of requiring complex lockstep configurations, the system creates independent copies that execute the same safety-critical function and compares their results, thereby achieving reliability through redundancy without the complexity of synchronized lockstep operation.
Solution Approach 2:
The patent introduces a microcontroller as an intermediary component that receives results from multiple microprocessors, compares them using configurable strategies, and determines whether hardware errors have occurred. This intermediary handles the complexity of error detection logic centrally, allowing the microprocessors to focus on their primary computational tasks while maintaining high reliability through coordinated comparison.
2Adaptability or versatility
If multiple comparison strategies are implemented, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent implements dynamic comparability by allowing the microcontroller to select from multiple configurable comparison strategies (exact match, range-based, tolerance-based) depending on the specific safety-critical application requirements. The comparison mechanism adapts its behavior based on the type of data being processed and the required safety level, providing versatility without requiring separate hardware for each comparison type.
Solution Approach 2:
The microcontroller serves as a universal comparison unit that can handle multiple types of comparisons (exact matching, numerical ranges, string comparisons) through a single configurable device. This multi-functional approach allows the same hardware to adapt to different safety-critical applications without requiring dedicated comparison circuits for each scenario, thereby improving adaptability while controlling complexity.
3Reliability
If result comparison is performed for all applications, then reliability is improved, but productivity decreases
Solution Approach 1:
The patent applies comparison only to safety-critical applications and their results, rather than all applications universally. The system identifies which applications require high-reliability verification and applies the comparison mechanism selectively to those specific cases, thereby maintaining high reliability for critical functions while minimizing the impact on overall system productivity by avoiding unnecessary comparisons in non-critical areas.
Data Source
AI summary
A method/device for recognizing a microprocessor hardware error, including comparing a first application's first result, running on a first microprocessor, with a second application's second result, running on the first/second microprocessor, with a microcontroller, providing comparison strategies, the hardware error being recognized as a function of the comparison, the microcontroller receiving a first message from the first microprocessor, and receiving a second message from the first microprocessor if the second application runs on the first microprocessor, or receives a first message from the second microprocessor if the second application runs thereon, the first message containing first comparison strategy information and first result information of a first function calculation, the second message containing second comparison strategy information and second result information of a second function calculation, the first and second strategy information being compared, the first and second result information being compared if the information about the comparative strategy coincides.