Microprocessor Parallelism-Based Energy Scaling
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Solution Overview
Problem
Existing microprocessors face challenges in achieving both high scalar and parallel performance due to differing design techniques required for each, leading to inefficiencies in energy usage and throughput.
Innovation Solution
A microprocessor design that dynamically varies energy expenditure per instruction based on available parallelism, using voltage and frequency scaling, core configuration, and throttle modules to adjust core activity and optional performance circuits, allowing for efficient power management within a fixed power budget.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If micro-architectural techniques such as speculative execution, branch prediction, and deep pipelines are used to reduce execution latency, then scalar performance is improved, but device complexity and energy consumption increase
Solution Approach 1:
The microprocessor dynamically adjusts its micro-architectural features and operational parameters based on the detected parallelism level of the workload. For scalar workloads, the processor enables speculative execution, deep pipelines, and complex branch prediction. For parallel workloads, it simplifies these features to reduce complexity and energy consumption while maintaining throughput performance.
Solution Approach 2:
The system changes operational parameters such as pipeline depth, speculation depth, and branch prediction aggressiveness based on the workload characteristics. When parallelism is detected, parameters are adjusted to favor throughput over latency, reducing the activation of complex micro-architectural features that increase device complexity.
2Productivity
If micro-architectural techniques such as wide superscalar processing and multithreading are used to increase execution throughput, then parallel performance is improved, but device complexity and energy consumption increase
Solution Approach 1:
The microprocessor dynamically configures its execution resources based on workload parallelism. For parallel workloads, it activates wide superscalar processing and multithreading to maximize throughput. For scalar workloads, it deactivates these complex features to reduce device complexity and energy consumption, relying instead on optimized sequential execution paths.
Solution Approach 2:
The system adjusts parameters controlling the number of execution units activated, thread scheduling policies, and resource allocation based on detected parallelism levels. This dynamic parameter adjustment allows the processor to match its complexity to the actual computational needs of the workload.
3Adaptability or versatility
If a microprocessor is designed to achieve both high scalar and parallel performance, then versatility is improved, but energy consumption increases
Solution Approach 1:
The microprocessor implements dynamic operation modes that adjust its architectural behavior based on workload characteristics. A throttle module detects the parallelism level and triggers appropriate operational modes: scalar-optimized mode for low parallelism workloads and parallel-optimized mode for high parallelism workloads. This dynamic adaptation allows the processor to maintain versatility while minimizing energy consumption for each specific workload type.
Solution Approach 2:
The system changes multiple operational parameters simultaneously based on workload detection, including clock frequency, voltage levels, execution unit activation, and micro-architectural feature enablement. These coordinated parameter changes allow the processor to achieve both scalar and parallel performance when needed while reducing energy consumption when full performance is not required.
Data Source
AI summary
A method and apparatus for changing the configuration of a multi-core processor is disclosed. In one embodiment, a throttle module (or throttle logic) may determine the amount of parallelism present in the currently-executing program, and change the execution of the threads of that program on the various cores. If the amount of parallelism is high, then the processor may be configured to run a larger amount of threads on cores configured to consume less power. If the amount of parallelism is low, then the processor may be configured to run a smaller amount of threads on cores configured for greater scalar performance.