Microprocessor Performance Prediction at First Interconnect Layer

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Solution Overview

Problem

Current methods for predicting microprocessor chip performance and power are inaccurate, often estimating final performance values within only 50-70% of actual values during the manufacturing process, making it difficult to identify defective chips and adjust the manufacturing process effectively early on.

Innovation Solution

A system and method that uses early manufacturing phase data to build a performance-predicting model, allowing for the classification of microprocessor chips into specific performance bins by receiving performance-predictive parameter data and chip metrics, and applying sorting criteria to predict final performance classification before the chips are fully fabricated.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If performance prediction is done using current prior art techniques during early manufacturing phase, then prediction can be made before final testing, but prediction accuracy is only 50-70% of final values

Engineering Contradiction:
Improvetime to identify defective chipsVSAvoidperformance prediction accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent performs performance prediction at the first interconnect layer stage (M1), which is the earliest possible point in manufacturing. This preliminary action allows identification of defective chips before costly final processing steps, enabling early removal of bad chips from the manufacturing flow and preventing waste of subsequent manufacturing resources.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary prediction model that correlates early manufacturing parameters (measured at M1 layer) with final performance metrics. This intermediary model acts as a bridge between early process parameters and final chip performance, enabling accurate prediction without waiting for final testing while maintaining high accuracy through statistical correlation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If early stage performance prediction is implemented, then defective chips can be screened out early, but requires developing accurate prediction models from limited early manufacturing data

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidprediction model complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the manufacturing process into distinct stages (M1 first interconnect layer, subsequent layers, final test) and develops prediction models that work specifically with data available at each stage. By segmenting the data collection and analysis process, the system can provide accurate predictions at M1 without requiring complex models that would need to process all final test data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms early manufacturing parameters (measured at first interconnect layer) into predictions of final performance metrics through statistical correlation. By changing the parameters from raw early measurements to predicted final values, the system enables early decision-making with the same information quality as final testing would provide.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If chips are sorted only after final metal level processing, then all manufacturing steps are completed, but time is lost and defective chips continue through unnecessary processing

Engineering Contradiction:
Improvechip performance classification accuracyVSAvoidmanufacturing cycle time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs performance classification at the first interconnect layer stage (M1), which is the earliest possible point in manufacturing. This preliminary classification enables immediate identification and removal of defective chips before they undergo subsequent costly and time-consuming manufacturing steps, thereby reducing both cycle time and waste.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10474774B2Power and performance sorting of microprocessors from first interconnect layer to wafer final test
Publication Date: 2019.11.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10474774B2 patent drawing
  • US10474774B2 patent drawing
  • US10474774B2 patent drawing

AI summary

A system, method and computer program product for sorting Integrated Circuits (chips), particularly microprocessor chips, and particularly that predicts chip performance or power for sorting purposes. The system and method described herein uses a combination of performance-predicting parameters that are measured early in the process, and applies a unique method to project where the part, e.g., microprocessor IC, will eventually be sorted. Sorting includes classifying the IC product to a subset of a family of products with the product satisfying certain performance characteristics or specifications, in the early stages of manufacturing, e.g., before the end product is fully fabricated.