Microprocessor Reciprocal Instructions for Division Acceleration

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Solution Overview

Problem

Conventional microprocessors face bottlenecks in computations due to limitations in the binary32 format, particularly in division operations where iterative algorithms like Newton-Raphson lead to slow and incorrect results, especially when dealing with large exponents outside the representable range.

Innovation Solution

Implementing reciprocal and reciprocal square root instructions that disregard the dynamic range, allowing for the generation of significands and exponents to accelerate numerical computations, enabling faster division and square root operations by treating exponents as unbounded, thus avoiding underflow issues and providing correct results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If iterative algorithms like Newton-Raphson are used for division computation, then division can be performed, but the computation speed becomes slow

Engineering Contradiction:
Improvedivision computation speedVSAvoidcomputation time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent replaces iterative mechanical computation processes (Newton-Raphson iterations) with a direct mathematical approach using reciprocal instructions. By computing the reciprocal of the denominator once and multiplying it with the numerator, the system eliminates the need for repeated iterative steps, thereby substituting a slow mechanical iteration process with a faster direct computation method.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent pre-computes the reciprocal of the denominator before performing the division operation. This preliminary action allows the actual division to be performed as a simple multiplication operation, which is significantly faster than iterative methods. The reciprocal is calculated once and then reused, avoiding repeated computational overhead.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If binary32 format is used for representing numbers, then standard floating-point operations are supported, but dynamic range is limited due to finite bit width of exponents

Engineering Contradiction:
Improvefloating-point operation supportVSAvoidcomputation accuracy for large exponents
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the exponent parameter representation by introducing an unbounded exponent field that can represent values beyond the standard binary32 range of [-126, +127]. This parameter change allows the system to handle extremely large or small numbers without overflow or underflow, maintaining computational accuracy for extreme values while preserving compatibility with standard floating-point operations.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If reciprocal is generated for numbers with large exponents, then division can be accelerated, but incorrect results occur due to underflow

Engineering Contradiction:
Improvedivision operation speedVSAvoidcomputation accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent prepares for potential underflow issues by designing an unbounded exponent representation system in advance. This cushioning mechanism ensures that when reciprocals of numbers with large exponents are computed, the result's exponent can be properly represented without underflow to zero. The system anticipates and prevents the underflow problem before it occurs, maintaining both speed and accuracy.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20240231759A9System and method to accelerate microprocessor operations
Publication Date: 2024.07.11 ARITH INC
  • US20240231759A9 patent drawing
  • US20240231759A9 patent drawing
  • US20240231759A9 patent drawing

AI summary

Systems and methods are directed to accelerating operations associated with a microprocessor. Example embodiments improve the operations of the microprocessor by providing devices (e.g., integrated circuits, independent accelerators) configured to use reciprocal or reciprocal square root instructions. Such devices can be further configured to follow the reciprocal or reciprocal square root instructions with multiplication or other instructions to finish division, square root, or other complex operations.