Microprocessor Reset Pin Signal Evaluation

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Solution Overview

Problem

Existing methods for evaluating the signals on a microprocessor's reset pin are costly and cumbersome, making real-time and cost-efficient analysis challenging.

Innovation Solution

Incorporating a reset reason status register and reset pin output signal generator within the microprocessor, which decodes the binary signal from the reset reason status register to provide an output signal indicating the reason for the processor's reset, allowing direct evaluation of the reset pin signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If specialized debugging tools are used to read signals on reset pin, then measurement precision is improved, but device complexity and cost increase

Engineering Contradiction:
Improvereset pin signal evaluationVSAvoiddebugging tools
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary device that couples between the reset pin and the evaluation system. This intermediary translates and conditions the reset pin output signal into a form that can be easily evaluated by standard logic analyzers or oscilloscopes, eliminating the need for specialized expensive debugging tools while maintaining measurement precision

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a simplified copy or representation of the reset pin signal through buffer circuits and logic level translators. This copied signal maintains the essential information about reset conditions but can be evaluated with inexpensive standard equipment rather than costly specialized tools

Inventive Principle:
Principle #26Copying

2Productivity

If real-time evaluation of reset pin signals is implemented, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvereset evaluation speedVSAvoidevaluation apparatus
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by pre-configuring buffer circuits, logic level translators, and decoding logic that are ready to immediately process and evaluate reset pin signals as they occur. This preliminary preparation enables real-time evaluation without adding complex processing systems, as the evaluation apparatus is already primed to handle reset events instantaneously

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8756408B2Hardware reset reason
Publication Date: 2014.06.17 CONTINENTAL AUTOMOTIVE SYSTEMS INC
  • US8756408B2 patent drawing
  • US8756408B2 patent drawing
  • US8756408B2 patent drawing

AI summary

Some microprocessors and microcontrollers have a bi-directional reset pin. In such devices, output signals on the reset pin are decoded by reset reason decode logic circuitry. The output of the reset reason decode logic can be provided to another device or processor, which generates a readily recognizable output signal indicative of a reason why the processor reset. Output signals that can indicate why a processor was reset can include a high or low state of different durations, serial bit streams or a number of pulses, each of which correspond to and therefore identify a reason why the processor was reset.