Microprocessor Series Calculation Circuit for Neural Network Activation
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Solution Overview
Problem
Existing microprocessors require multiple macro-instructions for calculating activation functions in neural networks, leading to inefficient execution due to out-of-order micro-instructions and high computational resource consumption.
Innovation Solution
A microprocessor with an execution circuit that performs series calculations using a multiplier and multiple accumulate units, implementing pipelining operations to efficiently approximate activation functions with simpler hardware, allowing for execution of complex computations with fewer resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple macro-instructions are used for calculating activation functions, then the calculation can be performed, but the execution efficiency is low due to out-of-order micro-instructions and high computational resource consumption
Solution Approach 1:
The execution circuit is segmented into multiple functional units including a multiplier unit for calculating exponentiation values and multiple MAU units for parallel series calculations. This segmentation allows different parts of the calculation to be performed simultaneously, improving efficiency while keeping each unit relatively simple
Solution Approach 2:
The patent introduces a new dimension of parallelism by implementing multiple MAU units that can perform calculations simultaneously. This multi-dimensional approach allows the circuit to process multiple terms of the series expansion in parallel, achieving high efficiency without requiring overly complex sequential control logic
2Loss of time
If complex computations are performed using traditional execution units, then the calculations can be completed, but a long time is required due to dependencies between out-of-order micro-instructions
Solution Approach 1:
The multiplier unit pre-calculates exponentiation values of the input x (such as x², x³, x⁴, etc.) before they are needed by the MAU units. This preliminary action eliminates dependencies between calculation stages, allowing the MAU units to immediately perform series calculations without waiting for intermediate results, thus reducing execution time
Solution Approach 2:
The patent introduces intermediate exponentiation values as mediators between the input and the final series calculation. These pre-computed values serve as intermediaries that decouple the computational dependencies, enabling parallel execution and reducing the overall execution time without significantly increasing circuit complexity
Data Source
AI summary
A microprocessor having the capability of executing a micro-instruction for series calculation is provided. The microprocessor includes an instruction decoder and an execution circuit for series calculation. The micro-instruction whose source operands correspond to an undetermined number x and a plurality of coefficients a0 to an (for x0 to xn) is decoded by the instruction decoder. Based on x and a0 to an, the execution circuit for series calculation includes at least one multiplier for calculating exponentiation values of x (e.g. xp), and includes at least one MAU (multiply-and-accumulate unit) for combining x, the exponentiation values of x, and the coefficients a0 to an for the series calculation.