Microprocessor Tail Microcode for Fast Macroinstruction Execution
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Solution Overview
Problem
Contemporary microprocessors face performance issues due to the need for conditional branch instructions in the microcode tail when translating macroinstructions into microoperations, which can be costly and inefficient, especially when handling both memory and register forms of macroinstructions.
Innovation Solution
A new microcode instruction, referred to as the TAIL instruction, is introduced, which is translated into appropriate store or move operations based on the form of the macroinstruction, eliminating the need for conditional branch instructions in the microcode tail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conditional branch instructions are used in the microcode tail to handle both memory and register forms, then the microprocessor can correctly execute both forms of macroinstructions, but performance is degraded due to the cost of conditional branches
Solution Approach 1:
The patent segments the microcode tail into separate routines for memory form and register form. The microtranslator selects and executes only the relevant segment based on the instruction form, avoiding the need for conditional branches. This is achieved by having the prolog set up a microtranslator state that directs the microcode fetch to the appropriate tail routine.
Solution Approach 2:
The prolog performs preliminary action by setting up the microtranslator state before executing the microcode tail. The prolog analyzes the instruction form and configures the microtranslator accordingly, so that when the microcode tail is executed, it automatically follows the correct path without needing conditional branches.
2Reliability
If separate microcode tails are maintained for memory and register forms, then correct execution is ensured, but the microcode ROM size increases
Solution Approach 1:
The patent makes the microcode tail universal by creating a single tail routine that can handle both memory and register forms. The microtranslator is designed to be configurable and can adapt its behavior based on the instruction form, allowing one microcode tail to serve multiple purposes instead of requiring separate tails.
Solution Approach 2:
The microtranslator is made dynamic by allowing its behavior to change based on the instruction form. The microtranslator can be configured during prolog execution to interpret the same microcode tail instructions differently depending on whether the original instruction was memory form or register form, eliminating the need for static separate microcode tails.
Data Source
AI summary
A microprocessor includes a first instruction translator that translates an instruction of an instruction set architecture of a microprocessor. The instruction may specify a first form that writes its result to a destination register or a second form that writes its result to memory. The first instruction translator generates, in response to encountering an instance of the instruction, an indication of whether the instance is of the first form or the second form. A microcode memory stores a tail instruction as part of a microcode routine invoked in response to encountering the instance of the instruction. A second instruction translator receives the tail instruction from the microcode memory and the indication and responsively generates a first micro-operation that writes the result to the destination register if the indication specifies the first form or a second micro-operation that completes a write of the result to memory if the indication specifies the second form.