Thread Switching in Microprocessor Using Reserved Memory Space

Solution Overview

Problem

Existing multithreading technologies face inefficiencies due to the high power consumption and time required for context switching between threads in microprocessors, particularly in portable devices, where saving and restoring register files are necessary for each thread switch.

Innovation Solution

Implementing a method for seamless thread switching in a single core microprocessor using a reserved memory space for each thread, where only modified registers are saved and restored, and utilizing a scoreboard to manage register data, allowing for efficient multithreading without full save and restore of the register file.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If full save and restore of register file is performed during thread switching, then thread context switching is completed accurately, but power consumption increases and switching time is extended

Engineering Contradiction:

Improvethread context switching accuracyVSAvoidpower consumption during thread switching

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts only the necessary register data (modified registers identified through scoreboard tracking) from the full register file, storing only these specific values in memory during thread switching. This selective extraction approach maintains context switching accuracy while significantly reducing the amount of data that needs to be saved and restored, thereby lowering power consumption and switching time.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of performing a complete save and restore of the entire register file, the patent implements partial action by saving and restoring only the subset of registers that were actually modified during thread execution. The scoreboard mechanism tracks which registers contain modified values, enabling the system to perform just enough save/restore operations to maintain correctness without the overhead of full register file operations.

Inventive Principle:

Principle #16Partial or excessive action

2Reliability

If full save and restore of register file is performed during thread switching, then thread context switching is completed accurately, but switching time is extended

Engineering Contradiction:

Improvethread context switching accuracyVSAvoidthread switching time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts only the necessary register data (modified registers identified through scoreboard tracking) from the full register file, storing only these specific values in memory during thread switching. This selective extraction approach maintains context switching accuracy while significantly reducing the amount of data that needs to be saved and restored, thereby lowering power consumption and switching time.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of performing a complete save and restore of the entire register file, the patent implements partial action by saving and restoring only the subset of registers that were actually modified during thread execution. The scoreboard mechanism tracks which registers contain modified values, enabling the system to perform just enough save/restore operations to maintain correctness without the overhead of full register file operations.

Inventive Principle:

Principle #16Partial or excessive action

3Productivity

If multiple threads share a single core microprocessor, then hardware resource utilization improves, but thread management complexity increases

Engineering Contradiction:

Improvehardware resource utilizationVSAvoidthread management complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a scoreboard as an intermediary data structure that mediates between multiple threads and the shared register file. The scoreboard tracks which registers are modified by each thread, enabling the system to manage thread contexts efficiently without requiring complex save/restore logic. This intermediary mechanism simplifies thread management while enabling effective resource sharing among multiple threads on a single core.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10318302B2Thread switching in microprocessor without full save and restore of register file

Publication Date: 2019.06.11 MIPS HLDG INC

AI summary

Certain embodiments of the present disclosure support a method and apparatus for efficient multithreading on a single core microprocessor. Thread switching in the single core microprocessor presented herein is based on a reserved space in a memory allocated to each thread for storing and restoring of registers in a register file. The thread switching is achieved without full save and restore of the register file, and only those registers referenced in the memory are saved and restored during thread switching.