Microprocessor Trace Buffer for Code-Free Debugging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing microprocessor debugging methods require code modification and incur performance overhead, as they rely on instrumenting customer code and dedicated hardware for trace functionality.

Innovation Solution

A method providing trace functionality for microprocessors using a buffer memory, trace control, and programmable registers to store and manage trace data without modifying the code, allowing for call, branch, context switch, and interrupt data collection with optional timed tracing and data masking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If code instrumentation is used to capture trace data, then trace functionality is achieved, but code modification is required and performance overhead occurs

Engineering Contradiction:
Improvetrace functionalityVSAvoidcode modification
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a trace buffer as an intermediary component that captures trace data without requiring code modification. The trace buffer acts as a mediator between the processor execution and the debugging tool, allowing trace functionality to be achieved while keeping the original code unchanged.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a copy of the execution trace data in the trace buffer, which can be analyzed without modifying the original code. This copying approach allows the debugging tool to examine program flow by reading from the trace buffer rather than instrumenting the code.

Inventive Principle:
Principle #26Copying

2Productivity

If dedicated hardware trace interface is provided, then performance overhead is avoided, but dedicated hardware tool is required

Engineering Contradiction:
Improveperformance overheadVSAvoiddedicated hardware
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The trace buffer can be used for multiple purposes including call trace, branch trace, and data trace, making it a universal debugging resource. This multi-functionality allows the same hardware structure to serve different debugging needs without requiring dedicated hardware for each trace type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The trace buffer automatically captures trace data during processor execution without requiring external hardware intervention. The buffer self-manages the trace data collection process, reducing the need for dedicated hardware trace interfaces while maintaining performance efficiency.

Inventive Principle:
Principle #25Self-service

3Device complexity

If standard microprocessor without trace feature is used, then hardware complexity is reduced, but trace data cannot be obtained without code instrumentation

Engineering Contradiction:
Improvehardware complexityVSAvoidtrace data acquisition
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The patent extracts the trace data capture functionality from the code instrumentation approach and places it in a dedicated trace buffer structure. This extraction allows standard microprocessors to provide trace capabilities without requiring code modification, as the trace buffer independently captures execution data.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7610517B2Microprocessor with trace functionality
Publication Date: 2009.10.27 INNOVASIC INC
  • US7610517B2 patent drawing
  • US7610517B2 patent drawing
  • US7610517B2 patent drawing

AI summary

A trace function method for microprocessors is provided. The method is operable with a microprocessor comprising an execution unit operable in one or a plurality of contexts. The method comprises: providing a memory coupled to the execution unit, utilizing the memory to store trace data during a trace operation; and providing hardware utilizable during a trace operation to assist in the trace operation.