Microsector Logic Fabric With Integrated Scan Registers
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Solution Overview
Problem
Programmable logic devices face inefficiencies due to large sector-based allocations in logic fabric, leading to over-allocation of resources and increased configuration times, particularly in partial reconfigurations and single event upset detection.
Innovation Solution
Implementing microsectors with smaller data registers and rearranging interconnections to enable finer granularity in resource allocation, allowing for write-only partial reconfigurations and reduced SEU detection times, utilizing quasi-delay insensitive (QDI) circuitry for faster data processing and filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If large sector-based registers are used in logic fabric, then resource allocation is simplified, but resource utilization efficiency deteriorates due to over-allocation
Solution Approach 1:
The patent divides large sector-based registers into smaller microsector registers. Each microsector contains its own data register and logic elements, enabling fine-grained allocation. This segmentation allows logic fabric resources to be allocated in smaller units, reducing over-allocation while maintaining allocation simplicity through standardized microsector building blocks.
2Device complexity
If large sector-based registers are used in logic fabric, then device complexity is reduced, but configuration time increases particularly in partial reconfigurations
Solution Approach 1:
By segmenting the logic fabric into independent microsectors with their own data registers, the patent enables partial reconfiguration to affect only specific microsectors rather than requiring reconfiguration of entire large sectors. This reduces the amount of data that needs to be loaded and processed during partial reconfiguration operations.
Solution Approach 2:
The patent implements write-only partial reconfiguration capability where only the necessary microsectors are reconfigured with new configuration data while other microsectors continue operating. This partial action approach avoids the excessive action of reconfiguring entire sectors, significantly reducing reconfiguration time.
3Reliability
If scan registers are integrated within each logic element, then testing capability is improved, but device complexity increases due to redundant structures
Solution Approach 1:
The patent merges the scan register functionality into the microsector data register structure, eliminating redundant separate scan registers. The microsector data register serves dual purposes: storing operational data and providing scan functionality for testing. This integration maintains comprehensive testing capability while reducing device complexity by removing duplicate structures.
Data Source
AI summary
Systems and methods described herein may relate to providing a dynamically configurable circuitry able to be programed using a microsector granularity. Furthermore, selective partial reconfiguration operations may be performed use write operations to write a new configuration over existing configurations to selectively reprogram a portion of programmable logic. A quasi-delay insensitive (QDI) shift register and/or control circuitry receiving data and commands from an access register disposed between portions of programmable logic may enable at least some of the operations described.