Microstrip Impedance Tuner With High Smith Chart Coverage
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Solution Overview
Problem
Existing electronic impedance tuners are large in size, high in cost, and have limited coverage rate in the Smith chart due to inefficient use of resources and increased circuit size, with prior designs either wasting resources or resulting in significant loss.
Innovation Solution
An electronic impedance tuner comprising an adjusting circuit, N identical cell tuning circuits, and a switch controller, where the adjusting circuit and cell tuning circuits are designed with specific microstrip lines, capacitors, inductors, and PIN diodes to generate 2N+1 impedance states, optimizing size and cost while ensuring high coverage rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple arrays and multiple combiners are adopted to generate impedance states, then the number of impedance states increases, but the number of PIN switch diodes increases, causing increased circuit cost, larger overall circuit size, and limited on-chip testing
Solution Approach 1:
The patent combines multiple tuning cells into a single array structure with shared combiners, merging functions that were previously distributed across multiple separate arrays. This consolidation reduces the total number of PIN switch diodes while maintaining the ability to generate multiple impedance states, directly resolving the contradiction between adaptability and device complexity
Solution Approach 2:
The tuning cells are designed with universal functionality where each cell can contribute to multiple impedance states when combined with others. The shared combiner network allows each tuning cell to serve multiple purposes in generating different impedance states, increasing adaptability without proportionally increasing circuit size
2Reliability
If the distances between tuning cells follow the prime relation to avoid duplicate impedance states, then impedance state uniqueness is ensured, but the optimal coverage rate in the Smith chart cannot be ensured
Solution Approach 1:
The patent optimizes the electrical length of transmission line segments connecting tuning cells and the values of reactive components to achieve optimal impedance distribution across the Smith chart. By carefully adjusting these parameters, the design ensures both unique impedance states and high coverage rate, resolving the contradiction between reliability and adaptability
3Measurement precision
If a non-uniform distribution electronic impedance tuner is designed with one PIN switch diode partially turned on, then loaded capacitance is controlled by accurate current control system, but the PIN switch diode has large series resistance resulting in large loss
Solution Approach 1:
The patent extracts the lossy function of the partially turned-on PIN switch diode and replaces it with a lossless switched capacitor implementation. The capacitance control function is achieved through digital selection of discrete capacitor values rather than analog current control, eliminating the series resistance loss while maintaining precision
Solution Approach 2:
The design uses multiple small capacitor elements that are switched in and out rather than relying on the continuous operation of a single lossy PIN diode. These capacitor elements are simple, low-cost components that can be rapidly switched without the energy loss associated with resistive elements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a compact, cost-effective electronic impedance tuner with a high coverage rate in the Smith chart, achieving accurate impedance simulation and performance testing with minimal resource wastage.
Implementation Method 1
the PIN switch diode is used as a variable resistor
Implementation Method 2
the loaded capacitance is controlled by an accurate current control system
Implementation Method 3
Each cell tuning circuit comprises a third microstrip line, a fourth microstrip line
Data Source
AI summary
An electronic impedance tuner comprises an adjusting circuit, N cell tuning circuits identical in structure and a switch controller. The adjusting circuit comprises a first microstrip line, a second microstrip line, a first capacitor, a second capacitor, a third capacitor, a first inductor, a second inductor and a first PIN diode. Each cell tuning circuit comprises a third microstrip line, a fourth microstrip line, a fourth capacitor, a fifth capacitor, a second PIN diode and a third capacitor. The capacitance Cd of the fourth capacitor meets the condition:4YsNπf2Γreq1-Γreq2≤Cd≤Ysπf1Γreq1-Γreq2.The length d of the third microstrip line meets the condition:λ1/4(N+1)<d<c4ɛreff[(Cd·Z0)2+(2πfBragg)2-Cd·Z0].The electronic impedance tuner has the advantages of being small in size and low in cost while having a high coverage rate in the Smith chart.