Grounded Microstrip Shielding for Crosstalk-Controlled PCB Routing

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Solution Overview

Problem

As transmission speeds increase, microstrip traces on circuit boards experience significant crosstalk and electromagnetic interference, leading to compromised signal integrity, while transitioning to stripline traces increases board complexity and cost.

Innovation Solution

Enhanced microstrip traces are shielded by a conductive plane connected to ground, mimicking stripline behavior, and impedance is fine-tuned using cutouts or varying conductive plane density to reduce crosstalk and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If microstrip traces are used for high-speed signal routing, then routing efficiency is improved, but crosstalk and electromagnetic interference increase

Engineering Contradiction:
Improverouting efficiencyVSAvoidcrosstalk and electromagnetic interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A dielectric layer is introduced as an intermediary substance between the microstrip trace and the ground plane. This dielectric layer acts as a mediator that provides electrical isolation and reduces electromagnetic coupling, thereby decreasing crosstalk and interference while allowing the microstrip configuration to maintain its routing efficiency

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent uses a relatively thin dielectric layer (solder mask) that is already present in standard PCB manufacturing processes. This approach avoids adding complex or expensive shielding structures while effectively reducing interference through the dielectric properties of the existing material

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If stripline traces are used to reduce crosstalk, then signal integrity is improved, but board complexity and cost increase

Engineering Contradiction:
Improvesignal integrityVSAvoidboard complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of converting the entire trace structure to stripline configuration, the patent applies the interference-reduction technique locally by adding a dielectric layer only in specific areas above the microstrip trace. This selective approach maintains signal integrity where needed while avoiding the complexity of complete stripline implementation

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The dielectric layer serves multiple functions: it provides electrical isolation, reduces crosstalk, maintains impedance control, and utilizes existing PCB manufacturing capabilities. This multi-functionality achieves stripline-like performance without requiring the full stripline structure

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enhanced microstrip traces maintain signal integrity similar to stripline traces, reducing crosstalk and electromagnetic interference while maintaining a lower impedance, thus improving high-speed signal routing efficiency.

Implementation Method 1

a conductive plane disposed above the secondary dielectric layer and the microstrip trace, wherein the conductive plane is grounded

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS12575021B2Enhanced microstrip trace
Publication Date: 2026.03.10 DELL PROD LP
  • US12575021B2 patent drawing
  • US12575021B2 patent drawing
  • US12575021B2 patent drawing

AI summary

A printed circuit board comprising a primary dielectric layer disposed underneath a microstrip trace and a secondary dielectric layer disposed above portions of the primary dielectric layer and the microstrip trace. The printed circuit board also includes a conductive plane disposed above the secondary dielectric layer and the microstrip trace, wherein the conductive plane is grounded.