Microstrip Lines With Tunable Impedance Via Segmented Ground
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional microstrip lines face challenges with increasing ohmic losses and limited tunability of characteristic impedance due to the scaling of backend processes, which results in area-consuming chip designs that hinder integration with CMOS devices.
Innovation Solution
A microstrip line structure featuring a conductive ground plane with strip openings and dielectric strips, allowing for adjustable characteristic impedances and wavelengths, and reducing chip area requirements by modifying the ground plane configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the vertical distance H between signal line and ground plane is reduced to achieve scaling, then integration density is improved, but ohmic losses increase and impedance matching becomes more difficult
Solution Approach 1:
The ground plane is segmented into multiple ground strips separated by dielectric material. This segmentation allows the ground plane to provide decoupling functionality while reducing the effective area between signal line and ground, thereby reducing ohmic losses even when vertical distance H is small
Solution Approach 2:
The dielectric strips are strategically placed between ground strips to create localized regions with different electromagnetic properties. This local quality variation enables better impedance control and reduced losses in specific areas where the signal line passes over the ground plane structure
2Loss of energy
If the ground plane is formed to provide decoupling and reduce substrate losses, then substrate-induced losses are reduced, but the characteristic impedance becomes difficult to tune
Solution Approach 1:
The ground plane structure is made dynamically adjustable through the use of dielectric strips with variable properties. By changing the dielectric constant or dimensions of these strips, the characteristic impedance can be tuned while the ground plane continues to provide decoupling functionality
Solution Approach 2:
The characteristic impedance is tuned by changing parameters of the dielectric strips (such as dielectric constant, width, or spacing) rather than changing the overall ground plane configuration. This allows impedance adjustment while maintaining the decoupling function
3Reliability
If conventional microstrip line length is increased to achieve quarter-wavelength impedance matching, then impedance matching is improved, but chip area consumption increases
Solution Approach 1:
The effective electrical length of the microstrip line is modified by changing the electromagnetic parameters in the region between the signal line and ground plane. The dielectric strips create regions with different effective permittivity, allowing the electrical length to be increased while keeping the physical length short, thus achieving impedance matching without increasing chip area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables tunable characteristic impedances and wavelengths, reducing chip area usage and overcoming the limitations of conventional microstrip lines, while maintaining reduced substrate losses and allowing for integration with CMOS devices.
Implementation Method 1
a dielectric strip filling the strip opening
Implementation Method 2
Ground plane 8 has the advantageous feature of providing decoupling between signal line 6 and substrate 4, and hence the substrate-induced losses are reduced
Data Source
AI summary
A microstrip line structure includes a conductive ground plane having a strip opening encircled by the ground plane. The strip opening extends from a top surface to a bottom surface of the ground plane. The microstrip line structure further includes a dielectric strip filling the strip opening; a dielectric layer over and contacting the ground plane; and a signal line over the dielectric layer, wherein the signal line has a portion directly above a portion of the dielectric strip, and wherein the signal line and the dielectric strip are non-parallel.