Microwave Backhaul Clock Recovery Using Ethernet Overhead Sync

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Solution Overview

Problem

Existing methods for clock synchronization in Ethernet backhaul networks, such as synchronous Ethernet and IEEE 1588v2, face challenges like high costs, packet delay variation, and bandwidth consumption, especially when supporting 3G and 4G/LTE TDD base stations which require phase synchronization not supported by traditional PDH and SDH networks.

Innovation Solution

A system that uses a clock signal generated by a root node, transmitted over a radio channel network, and recovered by child nodes using phase-lock loops, with the option to select between synchronization values and clock signals based on quality messages, allowing for frequency and phase synchronization without significant network upgrades or bandwidth reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronous Ethernet is used to transport clock synchronization, then clock delivery is achieved, but every intervening node must support Synchronous Ethernet requiring expensive upgrades

Engineering Contradiction:
Improveclock synchronization deliveryVSAvoidnetwork node upgrade requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the clock synchronization function from the data payload and places it in the Ethernet overhead field. This allows clock delivery without requiring intermediate nodes to support Synchronous Ethernet, as the overhead is processed only at endpoint devices.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses Ethernet overhead as an intermediary carrier for clock synchronization information. This mediator enables clock delivery over standard Ethernet infrastructure without requiring upgrades to intermediate switching nodes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If IEEE 1588v2 PTP protocol is used for packet-based timing, then frequency and phase synchronization is provided, but packet delay variation and asymmetric delays affect synchronization accuracy

Engineering Contradiction:
Improvephase synchronization accuracyVSAvoidsynchronization stability under traffic load
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent extracts timing information from packet payload and embeds it in Ethernet overhead, separating synchronization traffic from user data traffic. This eliminates the impact of packet delay variation on synchronization accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses periodic Ethernet overhead fields to carry clock synchronization information at regular intervals, providing continuous synchronization updates independent of variable packet traffic patterns.

Inventive Principle:
Principle #19Periodic action

3Reliability

If dedicated timing packets are transmitted for PTP synchronization, then master-slave synchronization relationship is maintained, but valuable bandwidth is consumed

Engineering Contradiction:
Improvesynchronization relationship maintenanceVSAvoidbandwidth consumption
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges clock synchronization information with Ethernet overhead fields that are already present in the data stream. This combines synchronization functionality with existing infrastructure without requiring separate dedicated timing packets.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The Ethernet overhead field serves multiple functions: carrying user data information and transporting clock synchronization signals. This multi-functionality eliminates the need for separate synchronization bandwidth.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides TDM-quality clock synchronization independently of network loading, reducing the need for expensive upgrades and maintaining reliable synchronization across microwave links, while supporting phase synchronization required for 3G and 4G/LTE TDD base stations without impacting radio link payload.

Implementation Method 1

Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop

Methodology Applied
Scientific EffectPhase-lock loop:

Data Source

PatentUS8983015B2Synchronization distribution in microwave backhaul networks
Publication Date: 2015.03.17 AVIAT U S
  • US8983015B2 patent drawing
  • US8983015B2 patent drawing
  • US8983015B2 patent drawing

AI summary

In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.