Microwave Plasma Etching for 3D Semiconductor Structures

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Solution Overview

Problem

The existing semiconductor device manufacturing methods require multiple etching operations with different processing conditions, leading to decreased efficiency and potential damage to the insulation layer due to etching residue and selectivity issues during the formation of 3-dimensional structures like MOS transistors.

Innovation Solution

A semiconductor device manufacturing method using microwave plasma with a bias power of 70 mW/cm2 or above and a pressure of 85 mTorr or above to perform a single etching operation, suppressing reaction product activation and maintaining high etching selectivity, thereby preventing residue formation and insulation layer damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple etching operations with different processing conditions are used, then etching selectivity is improved, but manufacturing efficiency deteriorates and process complexity increases

Engineering Contradiction:
Improveetching selectivityVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention changes the plasma processing parameters by operating at high pressure (50-150 mTorr, preferably 70-100 mTorr) and with low ion bombardment energy (low bias power), which fundamentally alters the etching mechanism to achieve high selectivity without requiring multiple processing steps. This parameter change enables a single etching operation to replace multiple conventional etching steps.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If multiple etching operations are performed, then etching selectivity is improved, but the number of processing steps increases

Engineering Contradiction:
Improveetching selectivityVSAvoidnumber of processing steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The invention merges the functions of multiple conventional etching steps into a single etching operation by using high pressure plasma with low ion bombardment. This combining of multiple processing steps into one reduces process complexity while maintaining the required etching selectivity between polysilicon and SiO2.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If conventional plasma etching is used, then etching capability is achieved, but reaction product activation causes residue formation and insulation layer damage

Engineering Contradiction:
Improveetching capabilityVSAvoidresidue formation and insulation layer damage
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The invention changes the plasma parameters to high pressure (50-150 mTorr) and low ion bombardment energy, which suppresses the activation of reaction products that cause residue formation. This parameter change eliminates the harmful effects while maintaining effective etching capability.

Inventive Principle:
Principle #35Parameter changes

4Speed

If high ion bombardment is used in plasma etching, then etching rate is improved, but insulation layer damage increases

Engineering Contradiction:
Improveetching rateVSAvoidinsulation layer damage
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The invention uses low ion bombardment energy (low bias power) combined with high pressure plasma to achieve effective etching without damaging the insulation layer. This parameter change eliminates the need for high ion bombardment while maintaining etching capability and protecting the SiO2 layer.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for accurate shaping and efficient manufacturing of semiconductor devices with 3-dimensional structures by maintaining high etching selectivity and preventing residue formation, reducing the need for multiple etching operations and protecting the insulation layer.

Implementation Method 1

an operation of performing an etching process by using plasma

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

removing a predetermined region of the conductive layer by patterning the predetermined region according to an etching process using microwave plasma

Methodology Applied
Scientific EffectMicrowave plasma: Microwave Radiation

Data Source

PatentUS9362135B2Semiconductor device manufacturing method
Publication Date: 2016.06.07 TOKYO ELECTRON LTD
  • US9362135B2 patent drawing
  • US9362135B2 patent drawing
  • US9362135B2 patent drawing

AI summary

A semiconductor device manufacturing method, the method including: forming an insulation layer having a protruding portion, the insulation layer having a surface and a rising surface that protrudes upward from the surface, on a semiconductor substrate; forming a conductive layer to cover the insulation layer having the protruding portion; and removing a predetermined region of the conductive layer by patterning the predetermined region according to an etching process using microwave plasma, which uses a microwave as a plasma source, while applying bias power of 70 mW/cm2 or above on the semiconductor substrate, under a high pressure condition of 85 mTorr or above.