Middle-Voltage Transistor Doping Structure for Leakage Control
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Solution Overview
Problem
As semiconductor devices integrate more elements into a given area, the etching of the gate dielectric layer leads to current leakage in transistors, which is a challenge in the fabrication process.
Innovation Solution
A middle voltage transistor structure is designed with two lightly doping regions surrounding a source/drain doping region, featuring a silicide layer that covers and contacts the source/drain doping region, and a second lightly doping region that mitigates the concentration difference between the source/drain and first lightly doping regions to prevent current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate dielectric layer is removed during fabrication, then the transistor can be completed, but current leakage occurs
Solution Approach 1:
A silicide layer is introduced as an intermediary between the source/drain doping region and the gate dielectric layer. This silicide layer prevents direct contact and potential leakage paths while allowing the gate dielectric to be removed for fabrication purposes. The silicide layer acts as a protective mediator that maintains electrical isolation.
Solution Approach 2:
The patent applies different doping concentrations at different locations: a first lightly doping region with lower concentration and a second lightly doping region with higher concentration surrounding the source/drain region. This local variation in dopant concentration creates a gradient that prevents carrier punch-through and reduces current leakage at critical interfaces.
2Productivity
If feature size shrinks to increase integration, then more elements can be integrated, but current leakage increases
Solution Approach 1:
The patent employs a nested structure where the second lightly doping region is embedded within the first lightly doping region, which in turn surrounds the source/drain doping region. This nested arrangement of doping regions with progressively different concentrations creates multiple barriers against carrier punch-through, enabling reliable operation at smaller feature sizes with higher integration density.
3Reliability
If dopant concentration difference is high, then transistor performance is improved, but electron punch-through occurs causing current leakage
Solution Approach 1:
The patent modifies the dopant concentration parameter by introducing two distinct lightly doping regions with different concentrations surrounding the source/drain region. The first lightly doping region has a lower dopant concentration and the second has a higher concentration, creating a gradual transition zone. This parameter change prevents abrupt concentration differences that would cause electron punch-through while maintaining necessary transistor performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure effectively prevents current leakage by ensuring a controlled dopant concentration gradient, reducing electron punch-through and enhancing the reliability of the transistor operation.
Implementation Method 1
a first ion implantation process is performed by taking the mask layer as a first mask to implant dopants into the substrate at two sides of the mask layer to form two first lightly doping regions
Data Source
AI summary
A fabricating method of a middle voltage transistor includes providing a substrate. A gate predetermined region is defined on the substrate. Later, a mask layer is formed to cover only part of the gate predetermined region. Subsequently, a first ion implantation process is performed by taking the mask layer as a first mask to implant dopants into the substrate at two sides of the mask layer to form two first lightly doping regions. After removing the mask layer, a gate is formed to overlap an entirety of the gate predetermined region. Next, two second lightly doping regions are respectively formed within one of the two first lightly doping regions. After that, two source/drain doping regions are respectively formed within one of the two second lightly doping regions. Finally, two silicide layers are formed to respectively cover one of the two source/drain doping regions.