MILC Poly-Silicon Memory Channel Gettering for Reliability

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Solution Overview

Problem

Nonvolatile memory devices with channel structures formed via Metal Induced Lateral Crystallization (MILC) face reliability issues due to trapped metal silicide, which degrades the operational performance of memory blocks.

Innovation Solution

A method involving the formation of a gettering layer on the semiconductor pattern, followed by thermal treatment to migrate the trapped metal silicide to the gettering layer, and subsequent etching to remove or reduce the metal silicide, ensuring it is only present at grain boundaries, thereby improving operational reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If MILC (Metal Induced Lateral Crystallization) is used to form the channel structure, then the crystallization quality is improved, but metal silicide becomes trapped in the semiconductor pattern causing reliability degradation

Engineering Contradiction:
Improvecrystallization qualityVSAvoidoperational reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent extracts the harmful metal silicide from the semiconductor pattern by introducing a gettering layer that selectively absorbs and traps the metal silicide at the grain boundaries, separating the beneficial crystallization effect from the harmful metal trapping

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The gettering layer acts as an intermediary element between the semiconductor pattern and the metal silicide, providing a dedicated site for metal silicide accumulation that prevents it from degrading the operational reliability of the memory device

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If metal silicide is present in the semiconductor pattern from MILC, then crystallization is enhanced, but it degrades operational performance of memory blocks

Engineering Contradiction:
Improvecrystallization enhancementVSAvoidoperational performance degradation
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by concentrating the metal silicide specifically at the grain boundaries of the semiconductor pattern through the gettering layer, allowing the bulk of the semiconductor pattern to remain free of harmful metal silicide while maintaining crystallization benefits

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces or removes trapped metal silicide, enhancing the operational reliability of memory blocks by ensuring it is confined to grain boundaries, thus improving the overall performance of nonvolatile memory devices.

Implementation Method 1

performing thermal treatment on the gettering layer, etching the gettering layer subjected to the thermal treatment

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

forming a gettering layer on the semiconductor pattern, followed by thermal treatment to migrate the trapped metal silicide to the gettering layer

Methodology Applied
Scientific EffectGettering: Gettering

Data Source

PatentUS20240081061A1Nonvolatile memory device and method for manufacturing the same
Publication Date: 2024.03.07 SAMSUNG ELECTRONICS CO LTD
  • US20240081061A1 patent drawing
  • US20240081061A1 patent drawing
  • US20240081061A1 patent drawing

AI summary

A volatile memory device and a nonvolatile memory device are provided. Provided is a plurality of gate electrodes and a plurality of insulating patterns alternately stacked on top of each other in a first direction, an information storage film formed along a sidewall of a trench, wherein the trench extends through the plurality of gate electrodes and the insulating patterns in the first direction, and a semiconductor pattern formed on the information storage film, wherein the semiconductor pattern is made of polycrystalline silicon composed of a first monocrystalline silicon and a second monocrystalline silicon, wherein a metal silicide is present in a grain boundary between the first monocrystalline silicon and the second monocrystalline silicon, wherein the metal silicide is absent in each of the first monocrystalline silicon and the second monocrystalline silicon except for the grain boundary therebetween.