MIM Capacitor 3D Electrode Design for High Density

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Solution Overview

Problem

Existing MIM capacitors face limitations in increasing capacitance due to their two-dimensional structure, making it difficult to achieve large capacitance per unit area, and they are challenging to manufacture with reduced size for semiconductor devices.

Innovation Solution

The MIM capacitor design includes a lower metal layer with a broader surface area enhanced by a barrier metal layer and a plug in a via hole, allowing for increased capacitance and reduced size through a method involving a substrate with a lower metal interconnection, barrier metal layer, insulating layer, and upper metal layer formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a two-dimensional MIM capacitor structure is used, then the manufacturing process is simple, but the capacitance per unit area is limited

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidcapacitance per unit area
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from a two-dimensional capacitor structure to a three-dimensional structure by forming the lower electrode as a protruding structure that extends upward from the substrate. This vertical dimension allows the lower electrode to have a larger surface area without increasing the horizontal footprint, thereby increasing capacitance per unit area while maintaining manufacturing feasibility through standard deposition and etching processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the capacitor area is reduced to decrease device footprint, then the device size is reduced, but the capacitance value decreases

Engineering Contradiction:
Improvedevice footprintVSAvoidcapacitance value
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

By forming the lower electrode as a vertical protruding structure, the patent increases the effective capacitance area in the vertical dimension while keeping the horizontal device footprint small. This allows the capacitor to achieve higher capacitance values within a reduced area by utilizing the third dimension (height) rather than expanding in the planar dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The upper electrode is positioned to overlap with the protruding lower electrode structure, creating a nested configuration where the electric field is concentrated in the vertical region between the two electrodes. This nesting arrangement maximizes the capacitance within the available vertical space, enabling high capacitance density in a compact footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Quantity of substance

If the lower electrode surface area is increased to enhance capacitance, then the capacitance increases, but the device area increases

Engineering Contradiction:
ImprovecapacitanceVSAvoiddevice area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent resolves this contradiction by increasing the lower electrode surface area in the vertical dimension rather than the horizontal dimension. The protruding structure extends upward from the substrate, providing additional electrode surface area that contributes to capacitance without increasing the device's horizontal footprint, thus achieving higher capacitance in a compact area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7557003B2MIM capacitor manufacturing method
Publication Date: 2009.07.07 COLUMBA TECH INC
  • US7557003B2 patent drawing
  • US7557003B2 patent drawing
  • US7557003B2 patent drawing

AI summary

Disclosed are an MIM (Metal-Insulator-Metal) capacitor and a method of manufacturing the same. The MIM capacitor includes: a lower metal layer and a lower metal interconnection on a substrate; a barrier metal layer on the lower metal layer; an insulating layer on the barrier metal layer; an upper metal layer on the insulating layer; an interlayer dielectric layer having a via hole on the lower metal interconnection; and a plug in the via hole.