MIM Capacitor Buffer Layer Etching Stop
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Solution Overview
Problem
Metal-insulator-metal (MIM) capacitor structures face challenges in achieving higher capacitance density while maintaining low electrical resistance, as reducing dielectric layer thickness can lead to unacceptably high leak current and dielectric layer damage during etching.
Innovation Solution
A novel MIM capacitor structure and method that employs an additional buffer layer as the etching-stop layer to maintain uniform dielectric layer thickness and a selectively disposed barrier layer on copper regions to minimize electrical resistance, replacing conventional dielectric layers and using a patterned buffer layer to protect against etching damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the dielectric layer thickness is decreased to increase capacitance density, then the capacitance integration is improved, but the leak current becomes unacceptably high
Solution Approach 1:
A buffer layer is introduced as an intermediary between the dielectric layer and the etching process. This buffer layer absorbs the etching damage that would otherwise directly affect the dielectric layer, enabling the use of thinner dielectric layers without compromising their integrity or increasing leak current.
Solution Approach 2:
The buffer layer is prepared in advance before the etching process. By having this protective layer already in place, the dielectric layer is pre-protected from etching damage, allowing for thinner designs that maintain reliability.
2Quantity of substance
If the dielectric layer thickness is decreased to increase capacitance density, then the capacitance integration is improved, but the dielectric layer is damaged by etching
Solution Approach 1:
The buffer layer serves as a mediator that absorbs the mechanical and chemical stress from the etching process. This intermediary layer prevents direct contact between the etching agents and the dielectric layer, preserving its thickness and structural integrity even when the dielectric layer is made thinner.
Solution Approach 2:
The buffer layer provides beforehand cushioning against etching damage. By positioning this protective layer between the etching process and the dielectric layer, it cushions the dielectric layer from damage before the etching can affect it, ensuring manufacturing precision is maintained.
3Reliability
If a barrier layer is disposed on all copper regions to prevent diffusion, then the metal electrode protection is improved, but the electrical resistance of copper wires increases
Solution Approach 1:
The barrier layer is applied selectively only to copper regions that require diffusion protection (such as metal electrodes), rather than uniformly to all copper regions. This local application maintains the necessary protection while preserving low electrical resistance in copper wire regions where conductivity is critical.
Solution Approach 2:
Instead of applying the barrier layer excessively to all copper regions, the invention uses partial action by limiting the barrier layer application only to where it is strictly necessary for diffusion protection. This partial application avoids the excessive resistance that would result from complete coverage.
Data Source
AI summary
A metal-insulator-metal capacitor structure includes a lower electrode, a buffer layer, a barrier layer, a dielectric layer and an upper electrode. The lower electrode is disposed in the buffer layer. The barrier layer covers part of the lower electrode and is disposed between the lower electrode and the upper electrode. The buffer layer serves as an etching stop layer to define the dielectric layer. The dielectric layer in the metal-insulator-metal capacitor structure has a uniform and ideal thickness.