MIM Capacitor With Cavity Extensions Reducing Series Resistance

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Solution Overview

Problem

Integrating metal-insulator-metal capacitors (MIMCAPs) in integrated circuit devices poses challenges in reducing series resistance while maintaining desirable electrical properties, especially for high-frequency applications, as existing techniques like 3D integration and silicon doping are complex and limited in capacitance density.

Innovation Solution

A MIMCAP structure with a planar bottom electrode and a top electrode having metal extensions into cavities, formed using standard damascene processing, reduces series resistance by lining the cavities with a metal-insulator-metal stack, allowing for a low aspect ratio and increased capacitance density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If 3D integration is used to increase capacitance density, then capacitance density is improved, but device complexity increases

Engineering Contradiction:
Improvecapacitance densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from planar capacitor structures to three-dimensional structures by forming cavities that extend into the substrate and lining them with MIM stacks. This vertical integration into the substrate dimension increases the effective capacitor area and capacitance density without proportionally increasing the planar footprint, thereby resolving the contradiction between capacitance density and device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The MIM stack is nested within the cavity structure that extends into the substrate. The lower conductive layer, insulator layer, and upper conductive layer are nested concentrically within the cavity walls, creating a compact three-dimensional capacitor that achieves high capacitance density while maintaining structural integration with the substrate.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Object-affected harmful factors

If doping of silicon areas is used to lower series resistance, then series resistance is reduced, but reliability deteriorates

Engineering Contradiction:
Improveseries resistanceVSAvoidreliability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent replaces the electrical doping mechanism with a direct metal conduction path. By forming metal extensions that protrude into the cavities and contact the MIM stack, the invention creates a low-resistance electrical connection without relying on silicon doping, thereby reducing series resistance while avoiding the reliability issues associated with doped regions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs a composite structure combining metal extensions with the MIM stack. The metal extensions (first and second conductive layers) are integrated with the insulator layer and MIM stack to form a composite electrode structure that achieves low series resistance through the metal-conductive path while maintaining the electrical properties of the MIM capacitor.

Inventive Principle:
Principle #40Composite materials

3Quantity of substance

If thickness of dielectric is decreased to increase capacitance, then capacitance is improved, but breakdown voltage decreases

Engineering Contradiction:
ImprovecapacitanceVSAvoidbreakdown voltage
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

Instead of increasing capacitance by decreasing dielectric thickness in the planar direction, the patent increases the effective capacitor area by extending the MIM stack vertically into the substrate through cavities. This three-dimensional approach increases capacitance while maintaining adequate dielectric thickness, thereby preserving breakdown voltage characteristics.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10141394B2Integrated circuit comprising a metal-insulator-metal capacitor and fabrication method thereof
Publication Date: 2018.11.27 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US10141394B2 patent drawing
  • US10141394B2 patent drawing
  • US10141394B2 patent drawing

AI summary

The disclosed technology relates to a metal-insulator-metal capacitor (MIMCAP) integrated as part of a back-end-of-line of an integrated circuit (IC). In one aspect, a MIMCAP comprises a first planar electrode having perforations formed therethrough, and a metal-insulator-metal (MIM) stack lining inner surfaces of cavities formed in the perforations and extending into the substrate. The MIMCAP additionally comprises a second electrode having a planar portion and metal extensions extending from the planar portion into the cavities. The first electrode and the planar portion of the second electrode are formed of or comprise planar metal areas of the respective metallization levels, which can be formed by a damascene process, which allows for a reduction of the series resistance. A low aspect ratio can be obtained using one electrode having a 3D-structure (the electrode having extensions extending into the cavities).