MIM Capacitor Formation Protecting Copper Bulk

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Solution Overview

Problem

In the formation of 3D integrated circuits, the etching process for on-chip metal insulator metal (MIM) capacitors can damage the copper bulk layer due to the removal of the etch stop layer, leading to corrosion and open electrical connections between the via plug and the copper bulk, resulting in non-functional devices.

Innovation Solution

A method is developed to form MIM capacitors by depositing an oxide-based dielectric layer with a thickness ranging from 50 angstroms to 2000 angstroms, which provides adequate protection and similar etch characteristics to the IMD layer, reducing the risk of etching through the etch stop layer and preventing damage to the copper bulk layer during contact formation, and includes forming a protection layer and cap layer to further safeguard the capacitor layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the etching process is used to form MIM capacitors, then the capacitor structure can be created, but the etch stop layer is removed which damages the copper bulk layer and causes corrosion

Engineering Contradiction:
Improvecapacitor structure formationVSAvoidelectrical connection stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

An oxide-based dielectric layer is deposited over the copper bulk layer before the etching process to form MIM capacitors. This preliminary protective layer prevents the etching chemicals from directly contacting and corroding the copper bulk, while still allowing the etch stop layer to be removed for capacitor formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The oxide-based dielectric layer serves as an intermediary protective barrier between the etching process and the copper bulk layer. It allows the etching process to proceed for capacitor formation while mediating the harmful effects on the copper bulk by preventing direct chemical contact.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the etch stop layer is removed to form capacitors, then the capacitor can be formed, but the copper bulk layer becomes exposed and susceptible to corrosion

Engineering Contradiction:
Improvecapacitor formationVSAvoidcopper bulk corrosion
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The oxide-based dielectric layer is deposited in advance over the copper bulk layer before the etch stop layer is removed. This preliminary action ensures that when the etch stop layer is removed for capacitor formation, the copper bulk remains protected from corrosion.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The oxide-based dielectric layer provides beforehand cushioning protection to the copper bulk layer. It acts as a buffer that prevents the harmful effects of the etching process from reaching the copper bulk, ensuring the copper remains intact and corrosion-free during capacitor manufacturing.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures the formation of functional MIM capacitors by preventing damage to the copper bulk layer and maintaining electrical connectivity, thereby enhancing the reliability of 3D ICs by reducing the risk of etching errors and ensuring stable electrical connections.

Implementation Method 1

depositing an oxide-based dielectric layer with a thickness ranging from 50 angstroms to 2000 angstroms

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS10050103B2Method of forming semiconductor structures including metal insulator metal capacitor
Publication Date: 2018.08.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10050103B2 patent drawing
  • US10050103B2 patent drawing
  • US10050103B2 patent drawing

AI summary

A method of making a metal insulator metal (MIM) capacitor includes forming a copper bulk layer in a base layer, wherein the copper bulk layer includes a hillock extending from a top surface thereof. The method further includes depositing an etch stop layer over the base layer and the copper bulk layer. The method further includes depositing an oxide-based dielectric layer over the etch stop layer. The method further includes forming a capacitor over the oxide-based dielectric layer. The method further includes forming a contact extending through the oxide-based dielectric layer and the etch stop layer to contact the copper bulk layer, wherein the forming of the contact removes the hillock.