High-Density MiM Capacitors With Floating Metal Fill
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Solution Overview
Problem
Large decoupling capacitors required for power integrity in electronic devices, such as mobile phones, occupy significant space and limit form-factor shrinkage and flexibility in PCB layout due to their size and the increased inductance of long connection routes, which affects noise suppression effectiveness.
Innovation Solution
The implementation of a floating metal fill in the dielectric between MiM capacitor plates and embedding smaller MiM capacitors between the plates of a larger one, increasing capacitance per unit area and reducing volume while maintaining a selected capacitance value, thereby reducing noise and space requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large decoupling capacitors are used to ensure power integrity and noise suppression, then noise suppression effectiveness is improved, but the device occupies significant PCB area and increases package height
Solution Approach 1:
The patent embeds smaller MiM capacitors between the plates of a larger MiM capacitor structure. The smaller capacitors are positioned in the space between the larger capacitor's plates, effectively nesting multiple capacitor units within a single footprint. This nested configuration allows multiple capacitance values to be achieved within the same PCB area, resolving the contradiction between noise suppression effectiveness and PCB area occupation.
Solution Approach 2:
The patent transitions from planar capacitor layouts to three-dimensional stacked MiM capacitor structures. By utilizing vertical stacking with multiple plates arranged in layers, the design achieves higher capacitance density without increasing PCB footprint. This dimensional change from 2D to 3D space utilization directly addresses the area constraint while maintaining noise suppression performance.
2Reliability
If large decoupling capacitors are used to ensure power integrity, then noise suppression effectiveness is improved, but form-factor shrink is limited due to increased package height
Solution Approach 1:
The nested capacitor configuration allows smaller capacitors to be positioned within the vertical space of the larger capacitor structure. This nesting approach achieves high total capacitance without proportionally increasing package height, as the capacitors share common plates and dielectric layers, thereby maintaining power integrity while enabling form-factor shrink.
3Reliability
If decoupling capacitors are placed in close proximity to ICs to reduce noise, then noise suppression effectiveness is improved, but layout flexibility is reduced due to space constraints
Solution Approach 1:
The patent segments the capacitor function into multiple smaller MiM capacitor units that can be independently positioned and configured. These segmented capacitor units can be distributed across the PCB and placed close to different IC blocks, providing layout flexibility while maintaining effective noise suppression for each local power domain.
Solution Approach 2:
The nested MiM capacitor structure serves multiple functions simultaneously: it provides decoupling capacitance for multiple IC blocks, acts as a local power reservoir, and can be configured in various capacitance values by selectively connecting different plate combinations. This multi-functionality allows a single capacitor structure to replace multiple discrete capacitors, enhancing layout flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a compact design that effectively suppresses noise, reduces the physical volume of capacitors, and minimizes transients, enabling smaller form factors and cost-effective packaging while maintaining power integrity.
Implementation Method 1
formation of a high-density metal-insulator-metal (MiM) capacitor... a first floating metal fill in the dielectric between the first MiM capacitor plates and the second MiM capacitor plates
Data Source
AI summary
Various embodiments include, for example, a noise suppression filter for a power-delivery network (PDN). In one exemplary embodiment, a capacitor device, which may be used as at least a portion of the noise suppression filter, includes a first conductive plate and a second conductive plate with a dielectric material formed between the first conductive plate and the second conductive plate. A floating conductive fill layer is formed within the dielectric material and between the first conductive plate and the second conductive plate. Other embodiments of capacitors, and methods of forming the capacitor, are disclosed.