MIM Capacitor Top Electrode Footing Profile Etching
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Solution Overview
Problem
Conventional etching processes for forming Metal-Insulator-Metal (MIM) capacitors result in non-uniform top surfaces and undercuts, leading to leakage and breakdown issues due to low etching selectivity, which affects the reliability and performance of capacitors.
Innovation Solution
The etching selectivity is increased by using a process gas predominantly composed of CF4 during the etching of Anti-Reflective Coating (ARC) layers and top electrode layers, with optimized conditions to achieve a high etching selectivity greater than 5.0, resulting in a more planar top surface and reduced undercut, thereby improving capacitor reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used for forming MIM capacitors, then the etching process can be completed, but non-uniform top surfaces and undercuts occur leading to leakage and breakdown issues
Solution Approach 1:
The patent changes the etching process parameters by using a CF4-based process gas with specific conditions (pressure, power, gas flow rates) to achieve high etching selectivity greater than 5.0, which produces a more planar top surface and reduces undercut, thereby improving both manufacturing precision and capacitor reliability
Solution Approach 2:
The patent replaces the conventional etching process with a plasma-based etching process using CF4 gas, which provides better control over the etching rate and selectivity, enabling precise profile control and reducing defects that affect reliability
2Manufacturing precision
If etching selectivity is low, then the etching process can be performed quickly, but non-uniform top surfaces and undercuts result
Solution Approach 1:
The patent optimizes etching parameters including using CF4 process gas, controlling pressure, power, and gas flow rates to achieve high etching selectivity greater than 5.0, which simultaneously improves top surface planarity and maintains acceptable etching efficiency
Solution Approach 2:
The patent introduces CF4 process gas as an intermediary medium that enables high etching selectivity, acting as a mediator between the etching requirements and the desired planar top surface outcome
3Manufacturing precision
If etching selectivity is increased to greater than 5.0, then a more planar top surface and reduced undercut are achieved, but process optimization complexity increases
Solution Approach 1:
The patent specifies concrete parameter ranges (CF4-based process gas, specific pressure, power, and gas flow rate ranges) to achieve high etching selectivity, providing a standardized approach that reduces the complexity of process optimization while maintaining manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the planarity of the top electrode surface, reduces undercut, and improves the reliability and breakdown voltage of MIM capacitors, ensuring they meet specifications.
Implementation Method 1
The dielectric layer is etched using a process gas until the top electrode layer is exposed. In the etching of the dielectric layer, the dielectric layer has a first etching rate, and the top electrode layer has a second etching rate
Implementation Method 2
using a process gas predominantly composed of CF4 during the etching of Anti-Reflective Coating (ARC) layers and top electrode layers
Data Source
AI summary
A method includes forming a capacitor, which includes depositing a bottom electrode layer, depositing a capacitor insulator layer over the bottom electrode layer, depositing a top electrode layer over the capacitor insulator layer, and depositing a dielectric layer over the top electrode layer. The dielectric layer is etched using a process gas until the top electrode layer is exposed. In the etching of the dielectric layer, the dielectric layer has a first etching rate, and the top electrode layer has a second etching rate, and a ratio of the first etching rate to the second etching rate is higher than about 5.0.


