MIM Capacitor Networks for Second-Harmonic Control in Power Transistors
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Solution Overview
Problem
Existing capacitor networks in high-speed power amplifiers, particularly those using MOS capacitors, face limitations in improving second-harmonic termination, internal resistance, Q factor, and phase alignment, which hinder peak drain efficiency and output power in power transistors.
Innovation Solution
Implementing MIM capacitor networks with tailored capacitance and through-substrate vias to enhance electrical coupling and packaging flexibility, providing improved second-harmonic termination and phase alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MOS capacitors are used in existing capacitor networks, then the device can be manufactured with standard processes, but the second-harmonic termination, internal resistance, Q factor, and phase alignment are insufficient
Solution Approach 1:
The patent changes the fundamental parameter of capacitor type from MOS to MIM (Metal-Insulator-Metal) capacitors. This parameter change enables superior second-harmonic termination, lower internal resistance, higher Q factor, and improved phase alignment while remaining compatible with standard semiconductor manufacturing processes.
Solution Approach 2:
The patent employs MIM capacitor structures that combine multiple metal layers with insulator layers, creating a composite material system that delivers enhanced electrical characteristics including better harmonic control and reduced losses compared to single-material MOS capacitors.
2Productivity
If standard capacitor networks are used in power transistors, then the device complexity is low, but the peak drain efficiency and output power are limited
Solution Approach 1:
The patent applies MIM capacitors with specific electrical characteristics at the gate of the power transistor, providing localized harmonic control and impedance matching that directly improves peak drain efficiency and output power without requiring complex changes throughout the entire device.
Solution Approach 2:
The capacitor network is designed to dynamically control harmonic frequencies and phase relationships, enabling the power transistor to operate at optimal efficiency points across varying signal conditions, thereby improving productivity without proportionally increasing complexity.
3Adaptability or versatility
If MIM capacitor networks with through-substrate vias are implemented, then electrical coupling and packaging flexibility are enhanced, but the manufacturing process becomes more complex
Solution Approach 1:
The patent segments the capacitor structure into distinct metal layers and insulator layers with through-substrate vias, allowing independent optimization of each layer's properties and enabling flexible packaging configurations while maintaining manufacturability through standardized fabrication techniques.
Solution Approach 2:
The patent extends the capacitor structure into the substrate dimension through through-substrate vias, creating three-dimensional electrical coupling paths that enhance packaging flexibility and signal integrity without significantly complicating the planar manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MIM capacitor networks increase peak drain efficiency and output power by optimizing harmonic control, reducing intrinsic resistances, and facilitating better phase alignment in power transistors.
Implementation Method 1
An example capacitor network includes a bond pad and one or more metal-insulator-metal (MIM) capacitors
Implementation Method 2
The second metal layer is coupled to a ground plane on a bottom side of the substrate by the vias
Data Source
AI summary
New types, structures, and arrangements of capacitor networks for harmonic control and other purposes are described. An example integrated device package includes a power transistor formed on a first substrate, a metal-insulator-metal (MIM) capacitor network formed on a second substrate, bond wires electrically coupled between a bond pad of the second substrate and a gate contact of the power transistor, a metal-oxide-semiconductor (MOS) capacitor network formed on a third substrate, and bond wires electrically coupled between a bond pad of the third substrate and the gate contact of the power transistor. The MIM capacitor network can include a MIM capacitor, with a first metal layer of the MIM capacitor being electrically coupled to the bond pad of the second substrate and a second metal layer of the MIM capacitor being electrically coupled to a ground plane on a bottom side of the second substrate.