MIM Capacitor Electrode Architecture for Low RC and High Density
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Solution Overview
Problem
Conventional metal insulator metal (MIM) capacitors in integrated circuits face challenges with high RC values due to thin electrodes in deep trench architectures, limiting capacitance density and performance, especially at advanced technology nodes.
Innovation Solution
The use of thickened bottom and top electrodes achieved through a combination of atomic layer deposition (ALD) and physical vapor deposition (PVD) processes, along with novel material systems like titanium oxide insulators and hafnium-based layers, to reduce resistance and enhance capacitance density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If thin electrodes are used in deep trench MIM capacitor architectures, then capacitance density is improved, but RC values become excessively high
Solution Approach 1:
The patent transitions from planar electrodes to three-dimensional mesh electrodes, adding vertical and lateral dimensional complexity. This mesh structure provides multiple current pathways through the electrode, effectively reducing the equivalent resistance while maintaining the same footprint area, thus resolving the contradiction between high capacitance density and low RC values
Solution Approach 2:
The patent employs composite electrode structures combining different materials and geometries (mesh patterns with varying wire widths and spacing). This composite approach allows optimization of both capacitive coupling and electrical resistance properties simultaneously, achieving low RC values while maintaining high capacitance density
2Reliability
If electrode thickness is increased to reduce resistance, then RC values decrease, but device area increases
Solution Approach 1:
Instead of increasing electrode thickness in the vertical dimension, the patent creates resistance-reduction pathways by introducing mesh patterns in the lateral plane. This dimensional transformation allows resistance reduction without proportionally increasing the device footprint, as the mesh provides parallel current paths across the electrode area
3Ease of manufacture
If conventional fabrication processes are used for scaling, then manufacturing simplicity is maintained, but variability limits further scaling to smaller nodes
Solution Approach 1:
The patent segments the electrode formation into distinct deposition and patterning steps using standard ALD and lithography tools. This segmentation allows each step to be optimized independently with conventional equipment, reducing process variability while maintaining manufacturing simplicity and enabling scaling to smaller technology nodes
Solution Approach 2:
The patent utilizes parameter changes in standard fabrication processes (such as adjusting deposition thickness, etch selectivity, and lithographic dimensions) to adapt the mesh electrode structure to different technology nodes. This approach maintains ease of manufacture while achieving the precision required for scaling
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces RC values by 100x, increases capacitance density, and improves CMOS performance by enabling lower voltage operation and higher operational frequencies with reduced power consumption.
Implementation Method 1
a first electrode plate, and a first capacitor dielectric on the first electrode plate. A second electrode plate is on the first capacitor dielectric
Implementation Method 2
The use of thickened bottom and top electrodes achieved through a combination of atomic layer deposition (ALD) and physical vapor deposition (PVD) processes
Data Source
Figure 1A~1B
Figure 2
Figure 3A~3B
AI summary
Metal insulator metal capacitors are described. In an example, a metal-insulator-metal (MIM) capacitor includes a first electrode. An insulator is over the first electrode. The insulator includes a first layer, and a second layer over the first layer. The first layer has a leakage current that is less than a leakage current of the second layer. The second layer has a dielectric constant that is greater than a dielectric constant of the first layer. A second electrode is over the insulator.