MIM Capacitor Planarization Structure for Lithography Reliability
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Solution Overview
Problem
The uneven topology of MIM capacitors during fabrication leads to errors in forming conductive structures due to angled seed layer surfaces causing erroneous reflections in lithographic radiation, resulting in lower reliability and yield.
Innovation Solution
Forming a conductive structure with a metal core disposed over a base conductive layer having a substantially flat upper surface, achieved through planarization processes and additional electrochemical plating, which mitigates errors by reducing radiation reflections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MIM capacitors are formed with standard fabrication processes, then capacitor functionality is achieved, but uneven topology is created causing angled seed layer surfaces that reflect lithographic radiation erroneously
Solution Approach 1:
A planarization layer is formed over the MIM capacitors before forming the seed layer, creating a flat surface in advance. This preliminary planarization action prevents the angled seed layer surface formation that would otherwise cause erroneous lithographic radiation reflections, thereby improving both reliability and manufacturing precision.
Solution Approach 2:
The planarization layer acts as an intermediary between the uneven MIM capacitor surfaces and the seed layer. This intermediate layer absorbs the topography variations and provides a flat interface for subsequent processing, eliminating the harmful radiation reflections while maintaining capacitor functionality.
2Manufacturing precision
If additional planarization processes are performed to create flat surfaces, then lithography process window is improved, but fabrication process complexity increases
Solution Approach 1:
The planarization layer serves multiple functions: it provides a flat surface for lithography, acts as an etch stop layer, and serves as a barrier between the MIM capacitors and upper interconnect structures. This multi-functionality reduces the need for additional separate processes, thereby improving manufacturing precision without proportionally increasing fabrication complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The flat upper surface of the base conductive layer improves the process window for lithography, reducing errors in conductive structure formation and enhancing reliability and yield.
Implementation Method 1
additional electrochemical plating
Data Source
AI summary
Some embodiments relate to an integrated chip including a first metal insulator metal (MIM) capacitor disposed over a substrate. The integrated chip further includes a second MIM capacitor disposed over the substrate. The first MIM capacitor has a first outer sidewall facing a second outer sidewall of the second MIM capacitor. A dielectric structure is arranged over and laterally between the first MIM capacitor and the second MIM capacitor. A base conductive layer is arranged between the first MIM capacitor and the second MIM capacitor and has a substantially flat upper surface. A metal core arranged on the substantially flat upper surface of the base conductive layer.