Integrating MIM Capacitor and Thin Film Resistor in Two-Layer Metal Process
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Solution Overview
Problem
Conventional integrated circuit fabrication processes require three metal layers to integrate both MIM capacitors and thin film resistors, limiting their simultaneous inclusion in a two-layer metal process due to the need for multiple masking steps and area constraints.
Innovation Solution
A modular two-layer metal process is developed, where a MIM capacitor and a thin film resistor are integrated using only two additional masking steps, with the first metal layer forming the bottom plate of the MIM capacitor and the second metal layer forming the top plate and contact pads, allowing for parallel coupling and area savings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional process sequence is used to form both MIM capacitor and thin film resistor, then both components can be integrated, but the process requires three metal layers and five masking steps, increasing process complexity
Solution Approach 1:
The patent combines the formation of MIM capacitor bottom plate, thin film resistor contact pads, and MIM capacitor top plate into a single second metal layer, eliminating the need for separate via formation steps and reducing the total number of masking steps from five to two
Solution Approach 2:
The second metal layer serves multiple functions simultaneously: it forms the bottom plate for MIM capacitors, creates contact pads for thin film resistors, and provides interconnect pathways, thereby consolidating multiple specialized layers into one universal layer
2Device complexity
If a two layer metal process is used, then process simplicity is maintained, but only one component (either MIM capacitor or thin film resistor) can be included, not both
Solution Approach 1:
The patent utilizes the vertical stacking capability within the two metal layers to accommodate both component types: the first metal layer provides horizontal interconnects and MIM capacitor bottom plates, while the second metal layer adds vertical functionality with MIM capacitor top plates and thin film resistor contact pads, effectively using the third dimension (vertical layering) to increase functional density
3Reliability
If MIM capacitors are formed over transistors at the metal level, then large capacitance is achieved, but area requirements increase
Solution Approach 1:
The patent employs thin film dielectric layers (such as oxide or nitride) with thicknesses ranging from 50 to 200 nanometers to create high-capacitance MIM structures. These thin films provide high dielectric constants and precise thickness control, enabling large capacitance values in compact areas through the relationship C = εA/d, where the thin film dimension (d) directly increases capacitance density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the efficient integration of both MIM capacitors and thin film resistors in a two-layer metal process, reducing masking steps from five to two and allowing for flexible circuit design with area savings, while maintaining performance and matching resistor values.
Implementation Method 1
a metal stack is deposited on a semiconductor wafer substrate
Implementation Method 2
dielectric deposition
Data Source
AI summary
A method for integrating a metal-insulator-metal (MIM) capacitor and a thin film resistor in an integrated circuit is provided that includes depositing a first metal layer outwardly of a semiconductor wafer substrate. A portion of the first metal layer forms a bottom plate for a MIM capacitor. A second metal layer is deposited outwardly of the first metal layer. A first portion of the second metal layer forms a top plate for the MIM capacitor and a second portion of the second metal layer forms contact pads for a thin film resistor.


