MIM Capacitor Spacer Structure for Sidewall Moisture Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
MIM capacitors in integrated chips are prone to failure due to exposure of outer sidewalls of the lower electrode and capacitor dielectric, making them susceptible to moisture and plasma damage, which weakens the edge and reduces reliability.
Innovation Solution
A spacer made of silicon nitride is arranged along the opposing outermost sidewalls of the lower electrode, capacitor dielectric, and capping structure to protect these areas from moisture and plasma damage, while maintaining electrical contact and reducing the risk of short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the outer sidewalls of the lower electrode and capacitor dielectric are exposed, then the manufacturing process is simpler, but the device is susceptible to moisture and plasma damage reducing reliability
Solution Approach 1:
A spacer structure is introduced as an intermediary protective element between the harmful environment (moisture and plasma) and the vulnerable capacitor components (lower electrode and dielectric outer sidewalls). This spacer acts as a mediator that prevents direct contact between the harmful factors and the sensitive structures, thereby improving reliability without fundamentally changing the capacitor's core functionality.
Solution Approach 2:
The spacer is formed in advance before subsequent processing steps that may expose the structure to plasma or moisture. By establishing this protective barrier beforehand, the design prevents potential damage during manufacturing and operation, addressing the reliability issue proactively rather than reactively.
2Reliability
If a spacer is added to protect outer sidewalls, then reliability improves, but device complexity and manufacturing steps increase
Solution Approach 1:
The spacer serves as a protective intermediary that can be integrated into the existing manufacturing flow. By positioning it strategically around the lower electrode and dielectric, it provides continuous protection during subsequent processing steps without requiring complete redesign of the fabrication sequence.
Solution Approach 2:
The spacer is applied locally only where protection is needed (along the outer sidewalls of the lower electrode and capacitor dielectric) rather than uniformly across the entire device. This localized approach minimizes the impact on manufacturing complexity while providing targeted protection where it is most critical for preventing moisture and plasma damage.
3Strength
If the outer sidewalls are exposed, then the device structure is simpler, but the edge strength is weakened making it prone to failure
Solution Approach 1:
The spacer provides beforehand cushioning or protection to the vulnerable outer sidewalls of the lower electrode and capacitor dielectric. This protective layer is in place before any potential mechanical or environmental stress occurs, preventing edge damage and strengthening the structure against failure during subsequent processing and operation.
Solution Approach 2:
The spacer acts as a protective intermediary that physically shields the vulnerable edges of the lower electrode and dielectric from direct exposure to harmful environments and mechanical stresses. This mediator structure reinforces the edge regions without requiring fundamental changes to the capacitor's core design.
Data Source
AI summary
The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.