Multi-Layer MIM Capacitor Stack for TDDB Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing Metal-Insulator-Metal (MIM) capacitors suffer from time-dependence-dielectric-breakdown (TDDB) failure due to defects in the insulator layers, leading to short lifetimes, especially in high-performance computing applications where high capacitances are required.

Innovation Solution

The implementation of a multi-layer insulator structure in MIM capacitors, comprising a first and second hafnium-zirconium oxide (HZO) layer with a titanium oxide or aluminum oxide layer inserted between them, reduces defect linking and conducting paths along grain boundaries, enhancing TDDB performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single-layer insulator structure is used in MIM capacitors, then the device complexity is low, but the TDDB performance and reliability are poor due to defect linking and conducting paths along grain boundaries

Engineering Contradiction:
ImproveTDDB performanceVSAvoidinsulator structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The single-layer insulator structure is segmented into multiple insulator layers (first insulator layer, second insulator layer, and third insulator layer) stacked in sequence. This segmentation breaks the continuous grain boundaries that create conducting paths, thereby reducing defect linking and improving TDDB performance while managing the increased structural complexity through systematic layering.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite insulator structures combining different dielectric materials (e.g., HfO2, ZrO2, Al2O3, SiO2) in a multi-layer configuration. Each material contributes different properties that collectively enhance reliability by preventing defect propagation and reducing conducting paths along grain boundaries, thus improving TDDB performance despite the increased device complexity.

Inventive Principle:
Principle #40Composite materials

2Reliability

If the insulator layer thickness is increased to reduce capacitance density, then the TDDB performance improves, but the capacitance density decreases which is undesirable for high-performance computing

Engineering Contradiction:
ImproveTDDB performanceVSAvoidcapacitance density
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Different insulator layers are assigned different dielectric materials with varying dielectric constants (k-values). The first insulator layer may use high-k material (e.g., HfO2) while intermediate layers use lower-k materials (e.g., Al2O3, SiO2). This local quality variation allows the capacitor to achieve high capacitance density in specific regions while maintaining overall reliability through the multi-layer structure that prevents defect linking across the entire insulator stack.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of increasing thickness in one dimension to improve reliability, the patent transitions to a multi-layer vertical stacking approach. This dimensional change allows the insulator structure to achieve both high reliability (through multiple interfaces that block defect paths) and high capacitance density (through increased effective area and strategic use of high-k materials in specific layers) simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240088204A1Metal-Insulator-Metal Capacitors And Methods Of Forming The Same
Publication Date: 2024.03.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240088204A1 patent drawing
  • US20240088204A1 patent drawing
  • US20240088204A1 patent drawing

AI summary

Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.