MIM Capacitor Embedded in Topmost Thick Inter-Metal Dielectric
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Solution Overview
Problem
Current MIM capacitor fabrication methods can impact logic processes with backend RC model changes, IR drops, and reliability concerns, particularly due to the increasing number of interconnect levels, necessitating improved structures and manufacturing processes.
Innovation Solution
The method involves forming MIM capacitors within the topmost thick inter-metal dielectric layers, using a bottom and top electrode with a high-k dielectric material, and employing standard CMOS logic process flows without adding additional IMD sub-layers, allowing for high capacitance density without altering the CMOS logic process, thus maintaining stability across technology generations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MIM capacitors are formed using conventional fabrication methods, then capacitance is achieved, but logic process stability deteriorates due to backend RC model changes and IR drops
Solution Approach 1:
The patent extracts the MIM capacitor formation process from the conventional logic fabrication sequence by utilizing the topmost thick IMD layer as a dedicated capacitor formation region. This separation allows capacitor fabrication to occur without interfering with the logic process flow, eliminating backend RC model changes and IR drops while maintaining logic process stability across technology generations.
Solution Approach 2:
The patent utilizes the vertical dimension by forming MIM capacitors within the topmost thick IMD layer, which provides sufficient thickness to accommodate the capacitor structure without affecting the planar logic layers below. This three-dimensional approach allows high capacitance density while maintaining compatibility with standard CMOS logic processes.
2Reliability
If additional IMD sub-layers are added to form MIM capacitors, then capacitance density increases, but device complexity increases
Solution Approach 1:
The topmost thick IMD layer serves dual functions: it acts as the inter-metal dielectric for the logic interconnect structure and simultaneously provides the embedding medium for MIM capacitor formation. This multi-functionality eliminates the need for additional dedicated capacitor IMD layers, reducing device complexity while achieving high capacitance density.
Solution Approach 2:
The patent merges the logic IMD structure with the capacitor embedding structure by utilizing the existing topmost thick IMD layer for both purposes. This consolidation eliminates redundant layers and simplifies the overall device architecture while maintaining high capacitance density through the available thickness of the combined structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in MIM capacitors with high capacitance density, no spice model shift, and improved process reliability, ensuring stable performance across multiple generations of logic technology without additional IMD layers or process changes.
Implementation Method 1
MIM capacitors with high capacitance density
Implementation Method 2
high-k dielectric material
Data Source
AI summary
Embodiments of MIM capacitors may be embedded into a thick IMD layer with enough thickness (e.g., 10 KŘ30 KÅ) to get high capacitance, which may be on top of a thinner IMD layer. MIM capacitors may be formed among three adjacent metal layers which have two thick IMD layers separating the three adjacent metal layers. Materials such as TaN or TiN are used as bottom/top electrodes & Cu barrier. The metal layer above the thick IMD layer may act as the top electrode connection. The metal layer under the thick IMD layer may act as the bottom electrode connection. The capacitor may be of different shapes such as cylindrical shape, or a concave shape. Many kinds of materials (Si3N4, ZrO2, HfO2, BST . . . etc.) can be used as the dielectric material. The MIM capacitors are formed by one or two extra masks while forming other non-capacitor logic of the circuit.