Multi-Layer MIM Capacitor Structure with Ti/TiN ARC
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Solution Overview
Problem
Existing double metal-insulator-metal capacitor (MMC) structures face challenges in achieving high breakdown voltage (BVD) and long time-dependent dielectric breakdown (TDDB) lifetime while maintaining capacitance density.
Innovation Solution
A multi-layer structure is formed using a substrate with a bottom electrode plate layer featuring a titanium (Ti)/titanium nitride (TiN) top anti-reflection coating (ARC) formed via physical vapor deposition (PVD) at temperatures between 25 to 400°C, followed by successive layers of capacitor dielectric and electrode plates, optimizing the PVD process temperatures to enhance dielectric smoothness and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MIM capacitor structures are used, then manufacturing simplicity is maintained, but breakdown voltage and TDDB lifetime are insufficient
Solution Approach 1:
The capacitor structure is divided into multiple functional layers including bottom electrode plate layer, first capacitor dielectric layer, middle electrode plate layer, second capacitor dielectric layer, and top electrode plate layer. Each layer serves a specific function to collectively achieve high breakdown voltage and long TDDB lifetime while maintaining manufacturability through standardized deposition processes.
Solution Approach 2:
The patent employs composite material structures where different dielectric materials and electrode materials are combined in specific layers. The bottom electrode plate layer includes Ti/TiN/Al/Ti/TiN composite structure, and capacitor dielectric layers use combinations of silicon oxide, silicon nitride, and other materials to optimize both reliability and electrical performance.
2Reliability
If PVD process temperature is increased to improve dielectric smoothness, then BVD and TDDB lifetime improve, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent systematically varies PVD process temperatures across different deposition steps, using temperatures ranging from room temperature to 400°C depending on the specific layer being deposited. This optimized temperature profile achieves smooth dielectric surfaces and high breakdown voltage while avoiding excessive heating that would increase manufacturing complexity.
Solution Approach 2:
The bottom electrode plate layer is prepared with Ti/TiN adhesion and anti-reflection coating layers before dielectric deposition. This preliminary preparation ensures proper adhesion and surface quality for subsequent dielectric layers, preventing manufacturing issues that would require rework or additional process steps.
3Quantity of substance
If capacitance density is increased through double MMC structure, then circuit density improves, but achieving high BVD and long TDDB lifetime becomes more difficult
Solution Approach 1:
The double MMC structure nests multiple capacitor units within a compact vertical arrangement. The bottom capacitor (first dielectric layer between bottom and middle electrodes) and top capacitor (second dielectric layer between middle and top electrodes) are stacked, achieving high capacitance density while each capacitor maintains independent quality for high breakdown voltage and long TDDB lifetime.
Solution Approach 2:
Different regions of the capacitor structure are optimized for different functions: the bottom electrode plate layer uses Ti/TiN/Al/Ti/TiN composite structure for adhesion and electrical properties, while capacitor dielectric layers use specific materials and thicknesses optimized for breakdown voltage. This local optimization allows high capacitance density without sacrificing reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method results in a double MMC with higher BVD and longer TDDB lifetime without compromising capacitance density, as demonstrated by improved breakdown voltage and reliability plots.
Implementation Method 1
a first Ti/TiN layer comprising a titanium layer and a titanium nitride layer on the titanium layer to serve as a top anti-reflection coating (top ARC) of the bottom electrode plate layer is formed using a first and a second physical vapor deposition (PVD) processes
Data Source
AI summary
The present invention discloses a method of making a multi-layer structure for metal-insulator-metal capacitors, in which, a bottom electrode plate layer is formed on a substrate, wherein a Ti/TiN layer serving as a top anti-reflection coating (top ARC) of the bottom electrode plate layer including a titanium layer and a titanium nitride layer formed on the titanium layer is formed using a first and a second physical vapor deposition (PVD) processes at a temperature ranging from 25 to 400° C., and then a first capacitor dielectric layer, a middle electrode plate layer, a second capacitor dielectric layer, and a top electrode plate layer are formed on the bottom electrode plate layer in an order from bottom to top.