MIM Passive Layout With Variable Thickness for Dense IC Routing
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Solution Overview
Problem
Existing integrated circuits face challenges in achieving high integration and reliability due to the limitations of passive devices, such as MIM resistors and capacitors, which are formed with larger pitches and require complex routing designs, leading to decreased integration and stability.
Innovation Solution
The integrated circuit design incorporates MIM passive devices with non-uniform thicknesses and overlapping structures for metallization patterns, lower and upper electrodes, and dielectric layers, allowing for precise resistance and capacitance control, thereby enhancing integration and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If MIM passive devices are formed with conventional uniform thickness and non-overlapping structures, then manufacturing process is simpler, but integration density decreases and routing complexity increases
Solution Approach 1:
The patent applies local quality by creating non-uniform thickness in the metallization pattern, where different regions have different thicknesses to achieve specific resistance values. The metallization pattern includes a first region with a first thickness and a second region with a second thickness different from the first, allowing precise control of resistance without increasing overall device area or routing complexity.
Solution Approach 2:
The patent implements nesting by overlapping the metallization pattern with the upper electrode, where the metallization pattern is positioned such that it partially overlaps the upper electrode in the vertical direction. This overlapping structure allows for compact device layout and improved integration density while maintaining manufacturing feasibility.
2Ease of manufacture
If MIM passive devices use larger pitch dimensions, then manufacturing is easier, but integration density decreases
Solution Approach 1:
The patent changes the thickness parameter of the metallization pattern to control resistance values. By varying the thickness in different regions rather than changing the planar dimensions, the device achieves the desired electrical characteristics with smaller pitch dimensions, thereby improving integration density while maintaining ease of manufacture through standard thin-film deposition processes.
3Productivity
If non-uniform thickness and overlapping structures are used, then integration density increases, but manufacturing precision requirements increase
Solution Approach 1:
The patent achieves local quality by forming the metallization pattern with spatially varying thickness, where the thickness is controlled to be non-uniform across different regions. This allows precise resistance control in compact areas, improving integration density while using standard semiconductor manufacturing techniques that can achieve the required thickness precision through calibrated deposition processes.
Data Source
AI summary
An integrated circuit is provided. The integrated circuit includes a substrate, one or more active devise such as one or more transistors arranged on the substrate, a plurality of interlayer dielectrics arranged on the substrate, a first metallization pattern arranged on the plurality of interlayer dielectrics, a first lower electrode arranged on the first metallization pattern, a first dielectric layer arranged on the first lower electrode, and a first upper electrode arranged on the first dielectric layer, wherein a thickness of the first metallization pattern in a first direction perpendicular to the substrate is not uniform, e.g. is variable, e.g. is not planar.