MIMO IR HARQ Receiver with Symbol Vector-Level Redundancy Combining
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Solution Overview
Problem
MIMO IR HARQ systems often employ sub-optimal receiver structures, leading to increased bit- and symbol-error rates, reduced application quality, and increased system latency, necessitating improved decoding strategies and symbol vector-level combining techniques.
Innovation Solution
The implementation of a symbol vector-level combining technique in MIMO IR HARQ systems, where information bits are encoded into a mother code, transmitted, and iteratively retransmitted with punctured symbols, allowing for symbol vector-level decoding at the receiver, which aggregates and combines duplicative symbols rather than bits, thereby reducing error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sub-optimal receiver structures are used in MIMO IR HARQ systems, then device complexity is reduced, but bit-error rate and symbol-error rate increase
Solution Approach 1:
The receiver structure is segmented into distinct functional modules: MIMO receiver for signal processing, LLR calculator for log-likelihood ratio computation, combiner for aggregating redundancy information, and decoder for error correction. This modular segmentation enables optimal decoding performance while maintaining manageable complexity through clear separation of concerns.
Solution Approach 2:
The patent transitions from traditional bit-level combining to symbol vector-level combining, adding a dimensional aspect to the combining process. By operating on symbol vectors rather than individual bits, the system achieves better error rate performance while the modular structure keeps computational complexity manageable.
2Loss of time
If sub-optimal decoding strategies are used, then computational complexity is reduced, but system latency increases
Solution Approach 1:
The system performs preliminary actions by pre-calculating and storing log-likelihood ratios for received symbols before combining operations. This preliminary computation enables faster decoding decisions and reduces system latency, as the combiner can directly aggregate pre-computed LLR values without performing complex real-time calculations.
Solution Approach 2:
The decoder provides feedback to the combiner about decoding success or failure, enabling adaptive retransmission decisions. This feedback mechanism optimizes system latency by allowing the transmitter to send additional redundancy information only when necessary, rather than using fixed retransmission schedules.
3Productivity
If optimal symbol vector-level combining is implemented, then information transmission rate increases, but computational complexity increases
Solution Approach 1:
The computational process is segmented into distinct stages: MIMO reception, LLR calculation, symbol vector combining, and decoding. Each segment performs a specific function with optimized complexity, allowing the system to achieve high transmission rates through efficient symbol vector-level operations rather than monolithic complex processing.
Solution Approach 2:
The patent changes the parameter of combining operation from bit-level to symbol vector-level, which increases information transmission rate by exploiting the structure of MIMO symbols. The modular architecture manages the resulting computational complexity by dedicating specific modules to specific tasks.
Data Source
AI summary
Techniques are provided for transmitting and receiving a mother code in an incremental redundancy hybrid automatic repeat-request protocol. Each bit position of the mother code may be mapped to an output symbol, and each output symbol may be mapped to an antenna for transmission. One or more transmissions of symbols contained in the output symbols may be performed, where each transmission may include puncturing the mother code by selecting one or more symbols from the of output symbols, and transmitting each symbol in the one or more symbols on an antenna corresponding to that symbol. The mother code may be decoded, in part, by determining combinable bits contained within a set of received symbols, and computing one or more log-likelihood ratio values corresponding to each symbol in the set of received symbols.