Multi-Chip MIMO Radar Synchronization for 62.5 ps Alignment

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing MIMO radar systems face challenges in achieving precise synchronization across multiple chips, which affects the angular resolution and overall performance.

Innovation Solution

A method for synchronizing multiple radar chips using a master-slave configuration, involving intra-chip and inter-chip synchronization techniques, including 2 GHz chip synchronization, inter-range bin interpolation, and pulse swallowing to align transmitter and receiver operations within 62.5 ps accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple radar chips are used to improve angular resolution and performance, then the measurement precision and productivity are improved, but the device complexity and difficulty of detecting and measuring increase due to synchronization challenges

Engineering Contradiction:
Improveangular resolutionVSAvoidsynchronization complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The radar system is divided into multiple independent chips, each capable of autonomous operation with its own transmitters and receivers. This segmentation allows parallel processing and improved angular resolution while maintaining individual chip simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A master chip is introduced as an intermediary to coordinate synchronization among all chips. The master chip generates reference clock signals and transmits calibration sequences that slave chips use to align their operations, simplifying the overall synchronization architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple radar chips are used to improve performance, then the productivity is improved, but the difficulty of detecting and measuring increases due to inter-chip synchronization requirements

Engineering Contradiction:
Improveprocessing capabilityVSAvoidsynchronization alignment
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The system employs feedback mechanisms where each chip monitors its own transmission and reception timing, compares it with reference signals from the master chip, and automatically adjusts its operation to maintain synchronization. This closed-loop control simplifies multi-chip coordination.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Each radar chip is designed to be self-sufficient with integrated transmitters, receivers, and clock generation capabilities. This self-service design reduces inter-chip dependencies and simplifies synchronization while maintaining high processing capability.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If intra-chip and inter-chip synchronization techniques are implemented to achieve 62.5 ps accuracy, then the measurement precision is improved, but the device complexity increases

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidsynchronization mechanism
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system replaces complex mechanical or hardware-based synchronization mechanisms with software-defined timing algorithms and digital signal processing. This substitution achieves 62.5 ps synchronization accuracy through computational methods rather than physical mechanisms.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system dynamically adjusts timing parameters such as clock frequencies, pulse widths, and sampling rates to achieve precise synchronization. By changing operational parameters rather than hardware configuration, the system achieves high precision with reduced complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260023156A1Multi-chip synchronization for digital radars
Publication Date: 2026.01.22 ROBERT BOSCH GMBH
  • US20260023156A1 patent drawing
  • US20260023156A1 patent drawing
  • US20260023156A1 patent drawing

AI summary

A multi-chip MIMO radar system includes a plurality of chips, each chip comprising a plurality of transmitters and a plurality of receivers. The multi-chip MIMO radar system is configured to provide an exemplary chip synchronization such that the transmitters and receivers of each chip of the multi-chip MIMO radar system are synchronized with their own other transmitters and receivers, as well as with the transmitters and receivers of every other chip of the radar system.