MIMO Wireless Transceiver Architecture With Shared Signal Processing Chains
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Solution Overview
Problem
Existing MIMO wireless transceivers require significant additional circuitry and area for MIMO operation, as they typically replicate the entire signal processing chain for each additional input signal, leading to increased costs and complexity.
Innovation Solution
A wireless transceiver design that enables MIMO operation with minimal additional circuitry by reusing one signal processing chain for both SISO and MIMO modes, using a single pair of signal processing chains and a baseband processor, and sharing antennas between the receiver and transmitter, thereby reducing the implementation area required for MIMO functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the entire signal processing chain is replicated for each additional input signal to enable MIMO operation, then MIMO functionality is achieved, but device complexity and implementation area increase significantly
Solution Approach 1:
The patent applies universality by designing a single signal processing chain that can function in multiple modes: it processes signals from a single antenna in SISO mode and signals from multiple antennas in MIMO mode. The baseband processor universally handles both single-stream and multi-stream processing, eliminating the need for separate dedicated processing chains for each antenna while maintaining full MIMO functionality.
Solution Approach 2:
The patent merges the signal processing functionality for multiple antennas into a single shared processing chain. Instead of having separate processing chains for each antenna input, the invention combines them into one unified chain that sequentially or concurrently processes signals from multiple antennas, thereby reducing overall device complexity while preserving MIMO capabilities.
2Adaptability or versatility
If the entire signal processing chain is replicated for each additional input signal to enable MIMO operation, then MIMO functionality is achieved, but implementation area increases significantly
Solution Approach 1:
The baseband processor is designed as a universal component that can process signals from multiple antennas using the same hardware resources. This multi-functional design allows the processor to handle both SISO and MIMO operations without requiring additional dedicated processing area for each antenna, thereby significantly reducing the total implementation area while maintaining full MIMO capability.
Solution Approach 2:
The invention merges multiple signal processing functions into a single shared processing chain, consolidating what would traditionally require separate hardware blocks into one unified structure. This merging approach reduces the total silicon area or PCB space required by eliminating redundant processing components while preserving the ability to handle multiple input signals simultaneously.
3Reliability
If separate signal processing chains are used for each antenna in MIMO mode, then signal processing capability is maintained, but manufacturing cost increases
Solution Approach 1:
The signal processing chain is designed as a universal, reconfigurable unit that can be dynamically assigned to process signals from different antennas based on operational mode. This multi-functionality reduces the total number of processing chains required, thereby lowering component count, simplifying manufacturing processes, and reducing overall production costs while maintaining reliable signal processing capability for MIMO operations.
Solution Approach 2:
The invention combines multiple signal processing functions into a single shared chain, reducing the total number of discrete components that need to be manufactured and assembled. This consolidation simplifies the manufacturing process, reduces bill of materials costs, and lowers overall production expenses while preserving the necessary signal processing reliability through intelligent resource sharing and dynamic allocation.
Data Source
AI summary
A wireless transceiver contains a receiver and a transmitter. The receiver is operable in single-input single-output (SISO) mode as well as multiple-input multiple-output (MIMO) mode, and contains a pair of in-phase and quadrature signal processing chains and a baseband processor. In SISO mode, each of the processing chains in the pair is connected to receive a same modulated signal as input, and generates respective baseband outputs. The baseband processor processes the baseband outputs to demodulate the modulated signal. In MIMO mode, the signal processing chains in the pair receive different modulated signals and generate corresponding down-converted signals. The baseband processor processes the down-converted signals to demodulate the respective modulated signals received by the receiver. Corresponding techniques to provide MIMO in addition to SISO capabilities are implemented in the transmitter also. MIMO capability is thereby achieved in the wireless transceiver with minimal additional implementation area.