Mini-LVDS LCD Timing Controller Signal Multiplexing

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Solution Overview

Problem

The existing LCD devices require a large number of pins for transmitting video and control signals between the timing controller and the source drive IC, leading to increased size and potential signal loss due to the separation of these signals.

Innovation Solution

The LCD device combines control and video signals into a packet signal, which is transmitted between the timing controller and the source drive IC, allowing the source drive IC to separate them, thereby reducing the number of pins required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If control signals and video signals are transmitted separately through dedicated pins, then signal transmission reliability is improved, but the number of pins increases and device size increases

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidnumber of pins
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines control signals and video signals into a single integrated transmission channel. The timing controller multiplexes control signals (such as SOE, POL, POL2, CSC, H2) with video data signals, allowing both types of signals to share the same transmission path and pins, thereby reducing the total pin count from 19 to a smaller number while maintaining reliable signal transmission through proper signal separation at the receiver end.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transmission pins are designed to serve multiple functions by carrying both control signals and video signals through time-division multiplexing. The same physical pins that traditionally carried only video signals now also transmit control signals during specific time periods, making the transmission infrastructure universal and reducing the need for dedicated control signal pins.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If control signals and video signals are transmitted separately, then signal integrity is maintained, but PCB area increases due to more connection lines

Engineering Contradiction:
Improvesignal integrityVSAvoidPCB area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges control signal transmission with video signal transmission by using the same PCB trace routes for both signal types. The timing controller multiplexes control signals onto the existing video signal transmission paths, eliminating the need for separate dedicated control signal traces on the PCB, thereby reducing the overall PCB area required for signal routing.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If more pins are used for signal transmission, then signal loss is reduced, but the device size and pin package increase

Engineering Contradiction:
Improvesignal lossVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent combines multiple signal transmissions into fewer physical pins through multiplexing. By sharing the same transmission pins between control signals and video signals through time-division multiplexing, the patent reduces the total number of pins required while maintaining adequate signal transmission quality through proper signal timing and separation at the receiver end.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9001017B2Liquid crystal display device using a mini-LVDS method
Publication Date: 2015.04.07 LG DISPLAY CO LTD
  • US9001017B2 patent drawing
  • US9001017B2 patent drawing
  • US9001017B2 patent drawing

AI summary

Disclosed is an LCD device in which a control signal is received and transmitted via a transmission line to be used for receiving and transmitting LVDS video signal between a timing controller and a source drive IC, the LCD device comprising a liquid crystal display panel for display an image; a data driver for driving data lines of the liquid crystal display panel through a plurality of source drive ICs; and a timing controller for outputting a packet signal obtained by combining a control signal and video signal to the source drive IC, wherein the source drive IC separates and outputs the control signal and video signal from the packet signal transmitted from the timing controller.