Minimal Dependency Queue for Out-of-Order Execution

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Solution Overview

Problem

Modern high-performance CPUs face inefficiencies in out-of-order instruction execution due to the need for extensive dependency checking, which increases logic and wiring complexity and latency, especially when expanding the out-of-order window.

Innovation Solution

Implementing a minimal dependency queue that separates minimally dependent instructions from dependent instructions, allowing the former to be executed without initial dependency checks, thereby reducing the need for extensive checking and optimizing the dependency matrix size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If extensive dependency checking is performed for out-of-order instruction execution, then instruction execution accuracy is improved, but device complexity and latency increase

Engineering Contradiction:
Improveinstruction execution accuracyVSAvoidlogic and wiring complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the issue queue into two distinct parts: a minimal dependency queue for instructions with no dependencies and a regular issue queue for dependent instructions. This segmentation allows the processor to apply different handling strategies to different instruction types, reducing overall complexity while maintaining execution accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts minimally dependent instructions from the regular issue queue and places them in a separate minimal dependency queue. By taking out these instructions that require no dependency checking, the system eliminates unnecessary checking operations, reducing latency and complexity while preserving correct execution order.

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If out-of-order window size is increased to improve throughput, then productivity is improved, but dependency checking latency and device complexity increase

Engineering Contradiction:
Improveinstruction throughputVSAvoiddependency checking latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By dividing the issue queue into minimal and regular dependency queues, the system can process a larger out-of-order window without proportionally increasing dependency checking latency. Instructions in the minimal dependency queue are issued immediately without checking, while only dependent instructions require full checking, thus maintaining throughput while reducing average latency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial dependency checking only to instructions that actually require it (those in the regular issue queue), rather than performing full dependency checking on all instructions in the out-of-order window. This partial action approach reduces the time penalty associated with larger window sizes while still ensuring correct execution ordering where needed.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If dependency checking is performed on all instructions, then execution correctness is improved, but processing efficiency and power consumption worsen

Engineering Contradiction:
Improveexecution correctnessVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts instructions that do not require dependency checking from the main processing flow and places them in a separate minimal dependency queue. These extracted instructions are issued directly to the execution stage without undergoing dependency checking, thereby improving processing efficiency while maintaining execution correctness for instructions that actually require checking.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of performing dependency checking on all instructions (excessive action), the system performs dependency checking only on instructions that are actually dependent on other instructions (partial action). This selective approach reduces the number of checking operations, improving processing efficiency and reducing power consumption while preserving execution correctness.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10678549B2Executing processor instructions using minimal dependency queue
Publication Date: 2020.06.09 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10678549B2 patent drawing
  • US10678549B2 patent drawing
  • US10678549B2 patent drawing

AI summary

Examples of techniques for executing instructions out of order are described herein. An example computer-implemented method includes receiving, via a processor, a plurality of instructions to be executed. The method includes sending, via the processor, an instruction to a minimal dependency queue in response to detecting the instruction includes a minimally dependent instruction. The method also includes selecting, via the processor, an instruction from a set of instructions that are eligible to be executed based on a scheme. The method further includes executing, via the processor, the instruction.