Minimized Combined Scenario for Post-Silicon Validation
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Solution Overview
Problem
Post-silicon validation tests for system-on-chip (SoC) devices require efficient methods to minimize and optimize test scenarios for simulation, as existing methods often result in lengthy simulation times due to the combination of scenarios designed for different stages of validation, leading to impractical debugging and resource limitations.
Innovation Solution
A method is developed to generate a minimized combined scenario for simulation by selecting and modifying scenarios from post-silicon validation tests, including recording action start and end times, forcing specific execution orders, and discarding irrelevant loops, to create a versatile and efficient test configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If post-silicon validation tests use combined scenarios executed in loops, then comprehensive validation coverage is improved, but simulation time increases significantly
Solution Approach 1:
The patent segments the combined scenario into individual action scenarios, each with its own execution timeline and loop structure. By analyzing start and end times of each action, the system identifies which scenarios were executed concurrently with the failed scenario loop, allowing selective inclusion only of relevant segments in the minimized combined scenario, thereby reducing simulation time while maintaining validation coverage for the failing case.
Solution Approach 2:
The patent extracts only the necessary portions of the combined scenario by identifying and including only those action scenarios that were executed concurrently with the failed scenario loop. Scenarios that completed before or after the failed loop are discarded, extracting only the essential concurrent executions needed for debugging, thus significantly reducing the simulation time required for validation.
2Reliability
If all scenarios are included in the minimized combined scenario, then complete test coverage is maintained, but debugging efficiency decreases due to excessive simulation time
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different action scenarios based on their temporal relationship with the failed scenario loop. Scenarios executed concurrently with the failed loop are included with full detail, while scenarios executed sequentially before or after are excluded. This localized approach maintains test coverage for the critical failing case while improving overall debugging efficiency by eliminating irrelevant test portions.
3Reliability
If scenarios are executed concurrently to maximize validation thoroughness, then validation completeness is improved, but resource consumption increases
Solution Approach 1:
The patent introduces dynamics by adapting the scenario selection process based on the execution timeline of the failed scenario loop. The system dynamically determines which scenarios should be included in the minimized combined scenario based on their concurrent execution status. This dynamic approach maintains validation completeness for the failing case while reducing resource consumption by excluding scenarios that did not execute concurrently, thereby optimizing the balance between validation thoroughness and resource usage.
Data Source
AI summary
A method for generating a minimized combined scenario for use in simulation, from a post-silicon validation test that includes a combined scenario, may include obtaining a failed scenario loop of a scenario of the combined scenario that includes combined action scenarios that were executed in loops during a post-silicon validation test of a system on chip; and adding any loops of other scenarios of the combined scenario that were executed at least partially concurrently with the failed scenario loop, while discarding any loops of other scenarios of the combined scenario that were completed during the post-silicon validation test before the failed scenario loop or did not commence before the failed scenario loop was completed.