Minimum-Change Codec Circuit for Non-Standard Sequence Lengths

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Solution Overview

Problem

Conventional Gray code and Johnson counter are limited in their applicability due to their periodic nature, which restricts their use to specific lengths of recurrent sequences, leading to increased circuit costs and power consumption when trying to accommodate non-standard sequence lengths.

Innovation Solution

A codec system that combines a minimum change code generation circuit, a flag generation circuit, and a decoding circuit to generate a digital code and a flag, which together form a new code applicable to any recurrent sequence length, ensuring only one bit change for each count change.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional Gray code or Johnson counter is used, then the circuit can generate minimum change codes, but the circuit is limited to specific sequence lengths (powers of 2 for Gray code, even numbers for Johnson counter)

Engineering Contradiction:

Improveapplicability to different sequence lengthsVSAvoidcircuit structure limitations

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The code generation is divided into two independent parts: a conventional minimum change code generation circuit (Gray code or Johnson counter) and a separate flag generation circuit. The flag circuit tracks the period number and generates control signals that enable the system to handle any sequence length by combining the periodic code with period identification information.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A flag generation circuit is introduced as an intermediary component between the conventional minimum change code generator and the output. This flag circuit generates control signals based on the current period number, enabling the system to adapt to any sequence length while maintaining the simplicity of conventional code generators.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If memory is expanded to accommodate non-standard sequence lengths, then the circuit can support any sequence length, but the circuit cost and power consumption increase

Engineering Contradiction:

Improvesupport for non-standard sequence lengthsVSAvoidpower consumption

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

Instead of changing the physical memory size, the system changes the logical parameters by introducing a flag signal that indicates the current period number. This allows the same memory structure to be used for any sequence length by interpreting the code differently based on the flag state, avoiding the need for memory expansion and associated power consumption increases.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If memory is expanded to accommodate non-standard sequence lengths, then the circuit can support any sequence length, but the circuit cost increases

Engineering Contradiction:

Improvesupport for non-standard sequence lengthsVSAvoidcircuit cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The conventional minimum change code generation circuit is designed to be universal and can generate codes for any sequence length when combined with the flag generation circuit. This multi-functional approach eliminates the need for separate circuits for different sequence lengths, reducing overall circuit cost and simplifying manufacturing.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250192797A1Codec system and its encoding circuit and decoding circuit

Publication Date: 2025.06.12 REALTEK SEMICON CORP

AI summary

A codec system includes a minimum change code generation circuit, a flag generation circuit, and a decoding circuit. The minimum change code generation circuit is configured to generate a digital code. The flag generation circuit is coupled to the minimum change code generation circuit and is configured to generate a flag according to the digital code. The decoding circuit is configured to decode the digital code according to a preset value and the flag to generate an output value.