MIPI Bus Controller Status Synchronization
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Solution Overview
Problem
In mobile industry processor interface (MIPI) systems, signal transmission errors occur due to differing interpretations of the status of the shared bus by the host and slave, leading to abnormal operations and data corruption.
Innovation Solution
A bus detection and control method using a bus controller and multiplexer to detect statuses of the MIPI bus and output control signals, forcing the slave to maintain an initial state until the host also returns to the initial state, preventing signal transmission errors by switching between predefined and transmission signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the host and slave independently manage bus status without coordination, then each device can operate autonomously and respond quickly, but signal transmission errors occur due to status mismatches between host and slave
Solution Approach 1:
The patent implements a feedback mechanism where the slave device monitors the host's transmission status and sends feedback signals to synchronize status recognition. When the host initiates bus turnaround or enters idle state, the slave detects these status changes through feedback signals and adjusts its own status accordingly, ensuring both devices have consistent understanding of bus state without sacrificing autonomous response capability
Solution Approach 2:
The patent introduces status synchronization signals as intermediaries between host and slave. These intermediary signals carry status information and coordinate the status recognition between the two devices, allowing them to operate autonomously while maintaining consistency through the mediating status signals
2Productivity
If the slave immediately switches to transmitting end after bus turnaround, then data transmission can continue without interruption, but transmission errors occur if the host has not completed its status switch
Solution Approach 1:
The patent applies preliminary action by requiring the slave device to wait for confirmation that the host has completed its status switch before the slave begins transmitting. This preliminary verification step ensures that the bus is ready for the slave's transmission, preventing conflicts while minimizing delays through efficient status detection mechanisms
Solution Approach 2:
The slave device uses feedback signals to monitor whether the host has completed its status transition. The slave receives feedback from the host indicating when the bus is ready for slave transmission, allowing continuous operation while ensuring reliability through coordinated status synchronization
3Duration of action of moving object
If the host continues transmitting after timeout without returning to initial state, then data transmission can be maintained, but the slave enters incorrect status and causes abnormal operations
Solution Approach 1:
The slave device continuously monitors the bus for timeout conditions and host status through feedback signals. When the slave detects that the host has not returned to the initial state after a timeout period, it can identify the error condition and take appropriate corrective action, maintaining operational stability even when transmission duration extends beyond expected limits
Solution Approach 2:
The slave device performs self-service by monitoring its own status and the bus state, and can detect when it has entered an incorrect status due to host timeout. The slave can then initiate status correction procedures autonomously, ensuring operational stability without requiring external intervention
Data Source
AI summary
A bus detection and control method for a mobile industry processor interface system is disclosed, wherein a host is coupled to a slave with a mobile industry processor interface bus. The bus detection and control method includes steps of detecting statuses of the mobile industry processor interface bus and the host, to output a control signal; and outputting one of a predefined signal corresponding to an initial state and a transmission signal outputted to the mobile industry processor interface bus by the host as a reception signal of the slave according to the control signal.