MIPI C-PHY Clock Recovery Jitter Compensation
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Solution Overview
Problem
The Mobile Industry Processor Interface (MIPI) C-PHY's 3-phase symbol encoding on 3-wire lanes leads to encoding jitter due to staggered signal transitions, causing issues in clock recovery at the slave device.
Innovation Solution
A method where a MIPI master device transmits a symbol sequence with larger encoding jitters, such as symbol values 0 and 2, prior to packet data, allowing the MIPI slave device to determine and configure a proper timing delay for the clock recovery circuit, thereby controlling the pulse width of the clock signal to filter out encoding jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If 3-phase symbol encoding is used on 3-wire lanes, then data rate is improved (more than two bits per symbol), but encoding jitter is generated due to staggered signal transitions
Solution Approach 1:
The patent applies preliminary action by transmitting a calibration symbol sequence before actual data transmission. This sequence contains specifically designed symbol patterns that generate controlled encoding jitter, allowing the receiver to measure and compensate for timing offsets before receiving critical data, thus resolving the clock recovery accuracy issue while maintaining high data rates
Solution Approach 2:
The patent changes the timing delay parameter dynamically based on measured encoding jitter characteristics. By adjusting the timing delay of the clock signal according to the calibration results, the system compensates for the staggered signal transitions caused by 3-phase encoding, thereby improving clock recovery accuracy without sacrificing the high data rate capability
2Reliability
If multiple output signals change at every UI boundary, then data transmission reliability is improved, but time difference (encoding jitter) occurs due to staggered transitions
Solution Approach 1:
The patent implements feedback by using the calibration symbol sequence to measure encoding jitter characteristics and feed this information back to adjust the timing delay parameter. This closed-loop approach allows the system to compensate for the time differences caused by staggered signal transitions, maintaining reliable data transmission while minimizing encoding jitter impact
Data Source
AI summary
A method for a Mobile Industry Processor Interface (MIPI) master device for improving clock recovery at a MIPI slave device includes: transmitting a symbol sequence including a plurality of consecutive symbols which include at least one of a first symbol value and a second symbol value to the MIPI slave device prior to transmitting packet data to the MIPI slave device, wherein the first symbol value and the second symbol value bring relatively larger encoding jitters than other symbol values.