MIPI DSI/CSI-2 Receiver Circuit Mode Detection

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Solution Overview

Problem

Modern data interfaces, such as MIPI DSI/CSI-2, face complexity in hardware design due to the need to handle both Low Power (LP) mode single-ended signals and High Speed (HS) mode differential signals, requiring different bus line loading and termination, which complicates overall interface hardware implementation.

Innovation Solution

A circuit comprising a splitter, controller, and termination that automatically adjusts bus line loading based on signal mode, using comparators to convert input signals into appropriate differential and single-ended outputs, and a decoder to process only the HS mode signals for protocol decoding, reducing hardware complexity by eliminating the need for separate processing of LP mode signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If both LP mode signals and HS mode signals are converted and processed separately, then protocol decoding can be implemented, but hardware complexity increases due to different bus line loading and termination requirements

Engineering Contradiction:
Improveprotocol decoding capabilityVSAvoidinterface hardware complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the need for separate LP mode signal processing by using pure differential signal-based MIPI DSI/CSI-2 receiver systems. The receiver only processes HS mode differential signals, removing the complex LP mode conversion and processing paths while maintaining protocol decoding functionality through differential signal processing alone.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The receiver system is designed to handle both LP mode and HS mode signals through a unified differential signal processing architecture. The same receiver circuitry processes both modes by detecting the appropriate signal characteristics, eliminating the need for separate processing paths and reducing overall hardware complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If different bus line loading and termination are used for LP and HS modes, then signal integrity is maintained, but hardware complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidbus line loading complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The receiver employs dynamic adjustment of bus line loading and termination based on the detected signal mode. The system automatically switches between appropriate loading configurations for LP and HS modes, maintaining signal integrity without requiring separate static hardware paths. This dynamic reconfiguration is achieved through control circuits that adjust termination resistors and loading conditions in real-time.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution simplifies the hardware by allowing automatic mode detection and appropriate loading, reducing overall complexity and enabling efficient processing of MIPI DSI/CSI-2 interface signals, while maintaining compatibility with MIPI standards.

Implementation Method 1

a first set of the output signals generated based upon comparison of pairs of signals of the input signals against each other

Methodology Applied
Scientific EffectSignal comparison:

Implementation Method 2

a second set of the output signals generated based upon comparison of each signal of the input signals to a predetermined threshold voltage

Methodology Applied
Scientific EffectThreshold comparison:

Implementation Method 3

The termination may connect loads to each of the input lines, based upon the one or more control signals

Methodology Applied
Scientific EffectElectrical termination: Electrical Resistance

Data Source

PatentUS9094246B1Pure differential signal based MIPI DSI/CSI-2 receiver systems
Publication Date: 2015.07.28 ANALOG DEVICES INT UNLTD CO
  • US9094246B1 patent drawing
  • US9094246B1 patent drawing
  • US9094246B1 patent drawing

AI summary

A circuit may include a splitter, a controller, and a termination. The splitter may generate, based upon input signals, a plurality of output signals, wherein at least one of the input signals is in more than one different modes at different times and the output signals comprise a first set of the output signals generated based upon comparison of pairs of signals of the first set against each other and a second set of the output signals generated based upon comparison of each signal of the second set to a predetermined threshold voltage. The controller may determine, based upon the second set of the output signals, whether the input signals are in the one of the more than one different modes to generate one or more control signals. The termination may connect loads to each of the input lines, based upon the one or more control signals.