MIPI RFFE Address Assignment via Timed Voltage Detection

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Solution Overview

Problem

The issue of duplicate or coincidental USIDs in MIPI RFFE devices leads to communication errors and increased manufacturing costs due to the need for additional address pins or individual chip fusion, which is undesirable.

Innovation Solution

A method and device for MIPI RFFE address assignment that detects a voltage at a configuration terminal based on a MIPI RFFE signal timing, allowing reliable address setting using a single terminal by sensing the voltage during a defined sense period, ensuring stable voltage levels for accurate address determination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a manufacturer sets the USID for a MIPI RFFE device, then the device can communicate via the bus instance, but duplicate or coincidental USIDs may occur leading to communication errors

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidaddress uniqueness
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by detecting the voltage at the configuration terminal during a defined sense period before the device begins normal operation. The sense period is triggered by the rising edge of the supply voltage at start-up, allowing the address to be determined in advance during initialization, ensuring unique address assignment before communication begins

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism by using a configuration terminal and voltage detection system as a mediator between the physical device state and the logical address assignment. The voltage level at the configuration terminal serves as an intermediary signal that is detected and converted into a unique USID, preventing address conflicts without requiring additional address pins or manual configuration

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of information

If additional address pins or individual chip fusion is used to avoid duplicate USIDs, then address uniqueness is ensured, but manufacturing costs increase

Engineering Contradiction:
Improveaddress uniquenessVSAvoidmanufacturing cost
Core Design Contradiction:
Loss of informationVSEase of manufacture

Solution Approach 1:

The patent applies universality by making the configuration terminal multi-functional. The same configuration terminal that may already exist for other device functions is also used for address assignment. This eliminates the need for additional dedicated address pins, reducing device complexity and manufacturing costs while ensuring unique address determination through voltage-level detection

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements self-service by enabling the device to automatically determine its own unique address during the initialization phase. The device detects the voltage at its own configuration terminal and sets its USID autonomously without requiring external intervention, manual configuration, or additional manufacturing steps such as individual chip fusion, thereby reducing manufacturing costs

Inventive Principle:
Principle #25Self-service

3Device complexity

If voltage detection timing is not precisely controlled, then the address assignment process is simpler, but voltage levels may be unstable leading to incorrect address determination

Engineering Contradiction:
Improveaddress assignment complexityVSAvoidvoltage detection accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by defining a specific sense period during which voltage detection occurs, triggered by the rising edge of the supply voltage at start-up. This timing control ensures that voltage detection happens when the voltage has stabilized, achieving accurate measurement without overly complicating the address assignment process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic action by establishing a defined sense period with a specific duration (ending at an n-th clock period of the MIPI RFFE signal). This periodic timing framework provides structured voltage detection windows, ensuring stable and accurate voltage level detection while maintaining manageable system complexity through regular, predictable operation cycles

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables reliable and cost-effective address assignment for MIPI RFFE devices without additional address pins, reducing manufacturing costs and ensuring timely communication readiness.

Implementation Method 1

detecting a voltage at a configuration terminal of the MIPI RFFE device with a timing based on a MIPI signal received by the MIPI RFFE device

Methodology Applied
Scientific EffectVoltage detection: Electric Field

Data Source

PatentEP4047873B1Method for MIPI RFFE address assignment and MIPI RFFE device
Publication Date: 2025.08.20 INFINEON TECHNOLOGIES AG
  • EP4047873B1 patent drawingFigure 1~3
  • EP4047873B1 patent drawingFigure 4~5
  • EP4047873B1 patent drawingFigure 6~7

AI summary

Methods of address assignment and MIPI RFFE devices and MIPI RFFE devices are disclosed. The method comprises detecting a voltage at a configuration terminal of the MIPI RFFE device with a timing based on a MIPI RFFE signal received by the MIPI RFFE device, and setting an address for the MIPI RFFE device based on the detected voltage.