Mirror Clamp MOSFET Packaging for Gate Surge Suppression
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Solution Overview
Problem
In semiconductor devices, especially those using wide-band-gap semiconductors like SiC, a surge voltage can be generated due to parasitic inductance of wiring when switching elements are in the off state, leading to potential malfunctions and the need for effective surge voltage suppression.
Innovation Solution
The semiconductor device incorporates a mirror clamping circuit switching element located over the gate electrode of the semiconductor chip, both within the same package, to suppress the rise in potential of the control electrode when the switching element is in the off state, thereby reducing parasitic inductance and surge voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a wire is used to connect the source electrode of the main-circuit MOSFET and the source electrode of the short-circuit MOSFET, then the switching element can be located over different lands, but parasitic inductance increases and surge voltage is generated
Solution Approach 1:
The patent merges the main-circuit MOSFET and short-circuit MOSFET onto the same land, eliminating the need for wire connections between them. This integration removes the parasitic inductance introduced by external wires while maintaining the protective function of the short-circuit MOSFET against surge voltages on the gate electrode.
Solution Approach 2:
The patent extracts and eliminates the wire connection element from the circuit configuration. By removing the wire that connected sources on different lands, the parasitic inductance is taken out of the system, solving the surge voltage problem while maintaining electrical connectivity through direct metal contact on the same land.
2Reliability
If the mirror clamping circuit switching element is located over the gate electrode, then surge voltage is suppressed, but device complexity increases
Solution Approach 1:
The patent combines the mirror clamping circuit switching element with the main-circuit MOSFET on the same land, integrating multiple functions into a single device structure. This merging approach suppresses gate potential surges while avoiding the complexity of separate discrete components and their interconnections.
Solution Approach 2:
The main-circuit MOSFET is designed to serve multiple functions: primary switching operation and mirror clamping protection. By making the MOSFET structure universal and multi-functional, the patent eliminates the need for additional dedicated protection components, thereby reducing overall device complexity while maintaining reliable surge suppression.
Data Source
AI summary
A semiconductor device, including: a semiconductor chip including a switching element, the switching chip having a first control electrode formed on a front surface thereof; and a mirror clamping circuit including a mirror clamping circuit switching element that is located on the first control electrode of the semiconductor chip. The semiconductor chip and the mirror clamping circuit switching element are incorporated in a same package. The switching element is configured to operate in an on state and an off state. The mirror clamping circuit is configured to suppress a rise in a potential of the first control electrode of the switching chip when the switching element is in the off state.