Mirror-Image Programming for NAND Flash Memory Noise

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Solution Overview

Problem

NAND-type flash memory devices face challenges in data storage reliability due to coupling noise between adjacent memory cells, particularly when using three-state EEPROM cells in pair configurations, which can result in 3-bit data errors if a single cell fails.

Innovation Solution

Implementing mirror-image programming techniques for non-volatile memory devices with three-state memory cells arranged in a NAND-type structure, where threshold voltages of paired cells are programmed as mirror-images when storing the same 3-bit data, reducing coupling noise by controlling threshold voltages based on bit data and voltage margins.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If three-state EEPROM cells are used in pair configurations to increase storage density, then data storage capacity is improved, but coupling noise between adjacent cells increases causing data errors

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata storage reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies asymmetry by programming adjacent memory cells with different threshold voltage distributions rather than identical distributions. Specifically, one cell in each pair is programmed with a first threshold voltage distribution while the adjacent cell is programmed with a second threshold voltage distribution that is different from the first. This asymmetric programming approach reduces coupling noise between adjacent cells while maintaining the ability to store 3 bits per pair, thereby improving data storage reliability without sacrificing capacity.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If mirror-image programming is implemented to reduce coupling noise, then data storage reliability is improved, but programming complexity increases

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidprogramming complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by systematically varying the threshold voltage distribution parameters between adjacent memory cells. The control circuit programs cells with different threshold voltage distributions based on their positions and the data being stored. By changing the threshold voltage parameter (first threshold voltage distribution vs. second threshold voltage distribution) depending on the cell's location and the 3-bit data value, the system reduces coupling noise while managing programming complexity through structured parameter assignment.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7639529B2Non-volatile memory devices that utilize mirror-image programming techniques to inhibit program coupling noise and methods of programming same
Publication Date: 2009.12.29 SAMSUNG ELECTRONICS CO LTD
  • US7639529B2 patent drawing
  • US7639529B2 patent drawing
  • US7639529B2 patent drawing

AI summary

Non-volatile memory devices have improved data storage reliability resulting from mirror-image programming techniques that operate to reduce coupling noise between adjacent memory cells within a memory array. The adjacent memory cells include a first pair of memory cells and a second pair of memory cells. A program control circuit is provided to support mirror-image programming of the first and second pairs of memory cells when the two pairs of memory cells are storing the same 3-bit data.