Mirror Image Shielding Structure for PCB Signal Integrity
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Solution Overview
Problem
Conventional shielding structures in high-density electronic circuits lead to parasitic effects and signal distortion due to close proximity of elements and overall metal shielding, which wastes material and occupies large areas, compromising signal integrity.
Innovation Solution
A mirror image shielding structure is implemented, where a ground shielding plane with a shape similar to the electronic element is used, isolated by medium materials, reducing parasitic effects and vertical coupling, and optimizing the layout for embedded elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an overall metal shielding plane is used, then shielding effectiveness is improved, but parasitic capacitance increases and signal integrity deteriorates
Solution Approach 1:
The patent divides the continuous metal shielding plane into multiple discrete metal shielding structures positioned at specific locations beneath electronic elements. Each metal shielding structure is isolated from others by dielectric layers, preventing unwanted electrical coupling while maintaining individual shielding effectiveness. This segmentation approach reduces parasitic capacitance between shielding elements and minimizes impact on signal integrity.
Solution Approach 2:
The patent implements metal shielding structures only in specific regions where electronic elements are present, rather than using a continuous overall shielding plane. The metal shielding structures are strategically positioned beneath elements that require shielding, while leaving other areas without metal shielding. This localized approach provides targeted shielding effectiveness while minimizing parasitic effects across the entire circuit board.
2Object-affected harmful factors
If an overall metal shielding plane is used, then shielding effectiveness is improved, but material consumption increases and area occupation increases
Solution Approach 1:
The patent segments the shielding function into discrete metal shielding structures rather than using a continuous metal plane. This segmentation significantly reduces the total amount of metal material required while maintaining shielding effectiveness at critical locations. The dielectric layers between metal structures also reduce material consumption compared to a solid continuous metal plane.
Solution Approach 2:
The patent applies metal shielding only where needed beneath specific electronic elements, rather than covering the entire circuit board surface. This localized shielding approach reduces material consumption and area occupation while maintaining shielding effectiveness at critical positions. The dielectric layers further reduce material usage compared to continuous metal shielding.
3Area of moving object
If elements are placed closer together to increase density, then space utilization is improved, but coupling effects increase and cross talk occurs
Solution Approach 1:
The patent introduces dielectric layers as intermediary structures between metal shielding elements and electronic elements. These dielectric layers act as electrical isolators that prevent direct coupling between adjacent elements and shielding structures. The dielectric materials provide electrical insulation while allowing the elements to be positioned closely together, thus maintaining high density while reducing coupling effects and cross talk.
Data Source
AI summary
A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.