Mirrored Semiconductor Die Orientation for Bi-Directional Data Flow

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Solution Overview

Problem

Conventional systems face challenges in achieving bi-directional data flow without performance degradation, particularly in wireless communication systems, due to uni-directional data paths within semiconductor packages, which can lead to congestion and increased processing complexity with the addition of advanced technologies like antenna arrays and beamforming.

Innovation Solution

The solution involves arranging electrical devices as mirrored versions with data flows that are substantially opposite to each other, allowing for efficient interconnection and routing on a printed circuit board (PCB) or package, reducing congestion and enhancing multi-directional signal processing capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple ASIC or FPGA devices are added to process multi-directional data flows, then data processing capability is improved, but device complexity and routing congestion increase

Engineering Contradiction:
Improvedata processing capabilityVSAvoidrouting complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by rotating semiconductor dies by specific angles (e.g., 90 degrees) relative to each other on the substrate. This asymmetric arrangement allows data paths to flow in opposite directions through different dies without interfering with each other, enabling bi-directional data flow while maintaining organized routing. The asymmetric orientation of dies eliminates the need for complex routing schemes that would be required with symmetric placements.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent utilizes the spatial dimension by arranging multiple semiconductor dies in different orientations on a single substrate. Instead of adding more dies in a linear fashion which would increase routing complexity, the solution distributes dies across the substrate plane with specific angular relationships, effectively using two-dimensional space to manage data flow directions and reduce routing congestion.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If semiconductor die geometries are shrunk to increase integration, then processing performance is improved, but heat density and signal interference increase

Engineering Contradiction:
Improveprocessing performanceVSAvoidsignal interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

By rotating dies asymmetrically on the substrate, the patent creates spatial separation between data paths of opposite directions. This asymmetric layout reduces signal interference between adjacent dies while maintaining high integration density, as the angular separation provides natural isolation between signal paths without requiring additional shielding or spacing.

Inventive Principle:
Principle #4Asymmetry

3Ease of operation

If data paths are made bi-directional within a package, then routing efficiency is improved, but control flow congestion occurs

Engineering Contradiction:
Improverouting efficiencyVSAvoidcontrol flow congestion
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent segments the data processing function across multiple independent semiconductor dies, each handling specific data flow directions. By dividing the system into separate dies with dedicated data paths, the patent avoids control flow congestion that would occur in a single integrated bi-directional path, while maintaining routing efficiency through direct connections on the substrate.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10497673B2Systems and methods of interconnecting electrical devices
Publication Date: 2019.12.03 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US10497673B2 patent drawing
  • US10497673B2 patent drawing
  • US10497673B2 patent drawing

AI summary

Systems and methods of interconnecting electrical devices are provided. In one exemplary embodiment, an arrangement of interconnected electrical devices may include one or more first electrical devices with a first data flow and one or more second electrical devices with a second data flow. Further, the first electrical devices may be mirrored versions of the second electrical devices. Also, the first data flow may be substantially opposite to the second data flow.