Multi-fin MIS-HEMT Linearity via Segmented Widths
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Solution Overview
Problem
Existing semiconductor transistor technologies face challenges in achieving intrinsic linearity due to non-linearity issues, which lead to signal distortion and power loss, particularly at high drain currents, and current gain degradation in GaN-based HEMTs.
Innovation Solution
The development of a metal insulator semiconductor high electron mobility transistor (MIS-HEMT) with a substrate, buffer layer, and multi-layer fins of varying widths, where the gate metal and insulator conformally cover the fins, allowing for separate turn-on voltage thresholds to flatten the transconductance curve over an operational range of gate source voltage, enabling intrinsic tunability and wideband linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transistor structures are used, then manufacturing is simple, but transconductance degrades at high drain currents leading to signal distortion
Solution Approach 1:
The transistor channel is divided into multiple fins with different widths (e.g., 50nm, 100nm, 200nm, 500nm), each contributing differently to the overall transconductance. This segmentation allows the device to maintain linearity across a wider range of gate-source voltages by combining the characteristics of fins with different threshold voltages and transconductance profiles.
Solution Approach 2:
Different fins are designed with specific width characteristics to optimize local transconductance contributions. Narrower fins provide higher transconductance at lower gate voltages while wider fins contribute at higher gate voltages, creating a composite transfer function that maintains linearity across the entire operational range.
2Reliability
If multiple parallel MOSFETs with different widths are used for linearization, then linearity improves, but layout area increases substantially
Solution Approach 1:
Multiple fins with different widths are merged into a single integrated structure sharing common source and drain regions. This consolidation achieves the linearization effect of multiple parallel devices while occupying the area of a single transistor, eliminating the need for separate layout space for each fin component.
Solution Approach 2:
Fins of different widths are arranged in a nested configuration where narrower fins are positioned within the overall structure defined by wider fins. This nested arrangement allows all fins to share the same source-drain area while maintaining their individual electrical characteristics, achieving compact integration.
3Reliability
If conventional HEMT structures are used, then manufacturing is straightforward, but transconductance degradation occurs due to hot electron effects and self-heating
Solution Approach 1:
The HEMT channel is segmented into multiple fins with different widths, creating distributed current paths that reduce current density in each individual fin. This segmentation mitigates hot electron effects and self-heating by spreading the power dissipation across multiple parallel conduction paths, maintaining transconductance stability at high drain currents.
Data Source
AI summary
Devices and methods of the invention use a plurality of Fin structures and or combine a planar portion with Fin structures to compensate for the first derivative of transconductance, gm. In preferred methods and devices, Fins have a plurality of widths and are selected to lead to the separate turn-on voltage thresholds for the largest, intermediate and smallest widths of the MIS HEMT fins flatten the transconductance gm curve over an operational range of gate source voltage.