Multi-Input Switching Timing Analysis for Semiconductor Devices

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Solution Overview

Problem

Current semiconductor device operation timing analysis tools fail to accurately differentiate between multi-input switching (MIS) and single-input switching (SIS) elements, leading to erroneous signal timing conclusions and potential device failures due to inadequate reflection of MIS element behavior.

Innovation Solution

The development of an operation timing analysis apparatus and method that utilizes a graph-based analysis (GBA) method, including a timing input unit and an MIS analyzer, to generate and dynamically calculate MIS coefficients, accurately reflecting MIS effects and optimizing static timing analysis (STA) by considering MIS phenomena.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional timing analysis tools assume SIS element behavior for all cells, then the analysis process remains simple and consistent, but the accuracy of timing analysis for MIS elements deteriorates significantly

Engineering Contradiction:
Improvetiming analysis accuracyVSAvoidanalysis method complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the analysis approach by identifying and separating MIS elements from SIS elements. It introduces a specific identifier bit in the cell definition to distinguish MIS cells, enabling the timing analysis tool to apply different analysis methods to different cell types. This segmentation resolves the contradiction by allowing accurate MIS analysis without complicating the overall analysis framework.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by implementing MIS-specific analysis only where needed (in MIS elements) while maintaining conventional SIS analysis for other elements. The tool dynamically selects the appropriate analysis method based on the cell type identifier, applying enhanced local analysis quality to MIS elements without affecting the simplicity of SIS element analysis.

Inventive Principle:
Principle #3Local quality

2Reliability

If MIS elements are analyzed using SIS assumptions, then the analysis tool remains straightforward to implement, but signal timing conclusions become erroneous and device failures may occur

Engineering Contradiction:
Improvedevice operation reliabilityVSAvoidtiming analysis complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by pre-identifying MIS elements during the analysis setup phase through specific identifiers in cell definitions. This allows the timing analysis tool to prepare and apply appropriate MIS-specific analysis methods before actual timing analysis begins, ensuring reliable results without adding complexity during the execution phase.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10740522B1Apparatus and method of operating timing analysis considering multi-input switching
Publication Date: 2020.08.11 SAMSUNG ELECTRONICS CO LTD
  • US10740522B1 patent drawing
  • US10740522B1 patent drawing
  • US10740522B1 patent drawing

AI summary

An apparatus for operation timing analysis of a semiconductor device considering multi-input switching (MIS) includes a timing input unit that generates an MIS model of each of a plurality of cells constituting a semiconductor device, and an MIS analyzer that receives timing data of each of the plurality of cells and dynamically calculates an MIS coefficient on the basis of the MIS model and the timing data.